MAX1714AEEP+ Maxim Integrated Products, MAX1714AEEP+ Datasheet - Page 14

• Manufacturer Part Number: MAX1714AEEP+
• Description: IC CNTRLR STP DWN HS 20-QSOP
• Manufacturer: Maxim Integrated Products
• Type: Step-Down (Buck)r

Specifications of MAX1714AEEP+

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 2.5V, 3.3V, Adj
• Current - Output: 8A
• Frequency - Switching: 600kHz
• Voltage - Input: 2 ~ 28 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-QSOP
• Power - Output: 727mW
• Output Voltage: 1 V to 5.5 V
• Output Current: 3000 mA
• Mounting Style: SMD/SMT
• Switching Frequency: 600 KHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Synchronous Pin: No
• Topology: Buck
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

High-Speed Step-Down Controller
for Notebook Computers
14
Figure 5. Reducing the Switching-Node Rise Time
Power-on reset (POR) occurs when V
approximately 2V, resetting the fault latch and soft-start
counter, and preparing the PWM for operation. V
undervoltage lockout (UVLO) circuitry inhibits switching
and forces the DL gate driver high (to enforce output
overvoltage protection) until V
whereupon an internal digital soft-start timer begins to
ramp up the maximum allowed current limit. The ramp
occurs in five steps: 20%, 40%, 60%, 80%, and 100%;
100% current is available after 1.7ms ±50%.
A continuously adjustable analog soft-start function can
be realized by adding a capacitor in parallel with the
ILIM resistor. This soft-start method requires a minimum
interval between power-down and power-up to dis-
charge the capacitor.
The output voltage is continuously monitored for under-
voltage by the PGOOD comparator. In shutdown,
standby, and soft-start, PGOOD is actively held low.
After digital soft-start has terminated, PGOOD is
released if the digital output is within 6% of the error-
comparator threshold. The PGOOD output is a true
open-drain type with no parasitic ESD diodes. Note that
the PGOOD undervoltage detector is completely inde-
pendent of the output UVP fault detector.
The overvoltage protection (OVP) circuit is available in
the MAX1714A only, and is designed to protect against
a shorted high-side MOSFET by drawing high current
and blowing the battery fuse. The output voltage is con-
tinuously monitored for overvoltage. If the output is more
than 12.5% above the trip level of the error amplifier,
overvoltage protection (OVP) is triggered and the circuit
shuts down. The DL low-side gate-driver output is
then latched high until SHDN is toggled or V
______________________________________________________________________________________
MAX1714
Output Overvoltage Protection
Power-Good Output (PGOOD)
BST
DH
LX
POR, UVLO, and Soft-Start
5Ω
+5V
CC
rises above 4.2V,
V
CC
IN
rises above
CC
power is
CC
cycled below 1V. This action turns on the synchronous-
rectifier MOSFET with 100% duty and, in turn, rapidly
discharges the output filter capacitor and forces the out-
put to ground. If the condition that caused the overvolt-
age (such as a shorted high-side MOSFET) persists, the
battery fuse will blow. DL is also kept high continuously
when V
(Table 3).
Note that DL latching high causes the output voltage to
go slightly negative, due to energy stored in the output
LC tank circuit when OVP activates. If the load can’t tol-
erate being forced to a negative voltage, it may be desir-
able to place a power Schottky diode across the output
to act as a reverse-polarity clamp.
Overvoltage protection can be defeated using the no-
fault test mode (see No-Fault Test Mode section).
The output undervoltage protection (OVP) function is
similar to foldback current limiting, but employs a timer
rather than a variable current limit. If the MAX1714 out-
put voltage is under 70% of the nominal value 20ms after
coming out of shutdown, the PWM is latched off and
won’t restart until V
gled. Under- voltage protection can be defeated using
the no-fault test mode.
The over/undervoltage protection features can compli-
cate the process of debugging prototype breadboards,
since there are (at most) a few milliseconds in which to
determine what went wrong. Therefore, a test mode is
provided to totally disable the OVP, UVP, and thermal
shutdown features, and clear the fault latch if it has been
set. The PWM operates as if SKIP were grounded
(PFM/PWM mode).
The no-fault test mode is entered by sinking 1.5mA from
SKIP through an external negative voltage source in
series with a resistor (Figure 6). SKIP is clamped to
AGND with a silicon diode, so choose a resistor value of
approximately (V
Component selection for the MAX1714 is primarily dic-
tated by the following four criteria:
1) Input voltage range. The maximum value (V
must accommodate the worst-case high AC adapter
voltage. The minimum value (V
for the lowest battery voltage after drops due to con-
nectors, fuses, and battery selector switches. If
there is a choice at all, lower input voltages result in
better efficiency.
CC
UVLO is active, as well as in shutdown mode
Output Undervoltage Protection
FORCE
CC
power is cycled or SHDN is tog-
- 0.65V) / 1.5mA.
Design Procedure
No-Fault Test Mode
IN(MIN)
) must account
IN(MAX)
)