LTC3830ES#TRPBF Linear Technology, LTC3830ES#TRPBF Datasheet - Page 7

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LTC3830ES#TRPBF

Manufacturer Part Number
LTC3830ES#TRPBF
Description
IC DC/DC CONTRLR STEP-DWN 16SOIC
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC3830ES#TRPBF

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
3.3V, Adj
Current - Output
20A
Frequency - Switching
200kHz
Voltage - Input
3 ~ 8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-

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BLOCK DIAGRA
FREQSET (Pin 11/NA/NA): Frequency Set. Use this pin to
adjust the free-running frequency of the internal oscillator.
With the pin floating, the oscillator runs at about 200kHz.
A resistor from FREQSET to ground speeds up the oscil-
lator; a resistor to V
I
sets the threshold for the internal current limit compara-
tor. If I
into current limit. I
GND. Connect this pin to the main V
of Q1, through an external resistor to set the current limit
threshold. Connect a 0.1µF decoupling capacitor across
this resistor to filter switching noise.
I
to the switching node at the source of Q1 and the drain of
Q2 through a 1k resistor. The 1k resistor is required to
prevent voltage transients from damaging I
used for sensing the voltage drop across the upper
N-channel MOSFET, Q1.
PI FU CTIO S
MAX
FB
U
(Pin 13/NA/NA): Current Limit Sense. Connect this pin
(Pin 12/NA/NA): Current Limit Threshold Set. I
FB
drops below I
U
FREQSET
MAX
COMP
SHDN
CC
U
SS
MAX
slows it down.
has an internal 12µA pull-down to
QC
W
with G1 on, the LTC3830 goes
12µA
100ms DELAY
OSCILLATOR
INTERNAL
2.2V
1.2V
IN
QSS
V
+
REF
supply at the drain
ERR
CC
DISABLE
ILIM
FB
+
THERMAL SHUTDOWN
+
PWM
.This pin is
LOGIC AND
V
REF
12µA
– 3%
V
MIN
MAX
POWER DOWN
+
I
I
FB
MAX
+
PV
V
CC1
CC1
V
V
power internal circuits draw their supply from this pin.
Connect this pin to a clean power supply, separate from
the main V
4.7µF bypass capacitor. The LTC3830-1 and the 8-lead
LTC3830 have V
require a 10µF bypass capacitor to GND.
PV
Connect this pin to the main high power supply.
G2 (Pin 16/Pin 8/Pin 8): Bottom Gate Driver Output.
Connect this pin to the gate of the lower N-channel
MOSFET, Q2. This output swings from PGND to PV
remains low when G1 is high or during shutdown mode.
To prevent output undershoot during a soft-start cycle, G2
is held low until G1 first goes high. (FFBG in Block
Diagram.)
REF
+ 2.5V
CC
+ 3%
CC2
MAX
(Pin 14/Pin 7/Pin 7): Power Supply Input. All low
DISDR
+
(Pin 15/Pin 7/Pin 7): Power Supply Input for G2.
POR
IN
V
V
REF
REF
S
R
S
R
FFBG
supply at the drain of Q1. This pin requires a
– 3%
+ 3%
V
Q
Q
Q
REF
11.2k
CC
ENABLE
G2
and PV
LTC3830/LTC3830-1
18k
BG
CC2
tied together at Pin 7 and
3830 BD
PV
G1
PV
G2
PGND
FB
SENSE
SENSE
CC1
CC2
+
CC2
3830fa
7
. It

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