MC34163DW ON Semiconductor, MC34163DW Datasheet - Page 14

• Manufacturer Part Number: MC34163DW
• Description: IC REG SW INV DC-DC 3.4A 16SOIC
• Manufacturer: ON Semiconductor
• Type: Step-Down (Buck), Step-Up (Boost), Invertingr

Specifications of MC34163DW

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 1.25 ~ 40 V
• Current - Output: 3.4A
• Frequency - Switching: 50kHz
• Voltage - Input: 2.5 ~ 40 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: MC34163DWOS

The following Converter Characteristics must be chosen:
NOTES: 1. V
NOTES:
NOTES:
NOTES: 3.
(Notes 1, 2, 3)
Calculation
V
V
I pk (Switch)
ripple(pp)
ripple(pp)
I L(avg)
R SC
V out
t on
t off
t on
L
C T
V
2. V
3. The calculated t
I
V
out
out
D
in
I
L
p −
operating input voltage.
−
−
−
−
−
sat
F
Nominal operating input voltage.
Desired output voltage.
Desired output current.
Desired peak−to−peak inductor ripple current. For maximum output current it is suggested that
than 10% of the average inductor current I
threshold set by R
proportionally reduce converter output current capability.
Maximum output switch frequency.
Desired peak−to−peak output ripple voltage. For best performance the ripple voltage should be kept to a low value
since it will directly affect line and load regulation. Capacitor C
electrolytic designed for switching regulator applications.
− Output rectifier forward voltage drop. Typical value for 1N5822 Schottky barrier rectifier is 0.5 V.
− Saturation voltage of the output switch, refer to Figures 8 and 9.
DI L
V
V
on
in
in
ƒ
/t
V
I L(avg) )
* V sat * V out
8 C O
32.143 · 10 6
off
ref
Step−Down
* V sat * V out
V out ) V
I pk (Switch)
ƒ
1
SC
t on
t
must not exceed the minimum guaranteed oscillator charge to discharge ratio of 8, at the minimum
off
DI
. If the design goal is to use a minimum inductance value, let
t on
t
0.25
R 2
R 1
I out
off
ƒ
L
) 1
2
) (ESR) 2
) 1
DI
F
2
L
t on
Figure 28. Design Equations
http://onsemi.com
L(avg)
. This will help prevent I
14
V out ) V
V
I out
V
I L(avg) )
ƒ
32.143 · 10 6
ref
in
V
[
I pk (Switch)
Step−Up
in
DI
t on
t
* V sat
off
t on I out
t on
t
R 2
R 1
0.25
V sat
off
O
L
t on
t
ƒ
C
off
should be a low equivalent series resistance (ESR)
F
) 1
O
) 1
) 1
V
DI
2
in
L
t on
pk (Switch)
from reaching the current limit
D
I
L
= 2(I
L(avg)
Voltage−Inverting
I out
V
V
D
). This will
I L(avg) )
ƒ
32.143 · 10 6
ref
I
in
L
|V out | ) V
V
[
I pk (Switch)
be chosen to be less
in
* V sat
DI
t on
t
off
t on
t
R 2
R 1
t on I out
off
0.25
* V sat
L
t on
t
ƒ
off
C
) 1
O
) 1
) 1
DI
2
F
L
t on