IDT89HPES24NT3ZBBX IDT, Integrated Device Technology Inc, IDT89HPES24NT3ZBBX Datasheet

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IDT89HPES24NT3ZBBX

Manufacturer Part Number
IDT89HPES24NT3ZBBX
Description
IC PCI SW 24LANE 3PORT 420-SBGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT89HPES24NT3ZBBX

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
89HPES24NT3ZBBX

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Device Overview
PCI Express® switching solutions offering the next-generation I/O inter-
connect standard. The PES24NT3 is a 24-lane, 3-port peripheral chip
that performs PCI Express Base switching with a feature set optimized
for high performance applications such as servers, storage, and commu-
nications/networking. It provides high-performance switching functions
between a PCIe® upstream port, a transparent downstream port, and a
non-transparent downstream port.
can be used standalone or as a chipset with IDT PCIe System Intercon-
nect Switches in multi-host and intelligent I/O applications such as
communications, storage, and blade servers where inter-domain
communication is required.
Features
Block Diagram
© 2009 Integrated Device Technology, Inc.
The 89HPES24NT3 is a member of the IDT PRECISE™ family of
With non-transparent bridging (NTB) functionality, the PES24NT3
– Twenty-four PCI Express lanes (2.5Gbps), three switch ports
– Delivers 96 Gbps (12 GBps) of aggregate switching capacity
– Low latency cut-through switch architecture
– Support for Max Payload size up to 2048 bytes
– Supports one virtual channel and eight traffic classes
– PCI Express Base specification Revision 1.0a compliant
High Performance PCI Express Switch
SerDes
Logical
Layer
Phy
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
SerDes
Logical
Layer
Phy
Frame Buffer
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
...
®
x8 Upstream Port and Two x8 Downstream Ports
SerDes
Logical
Layer
24-Lane 3-Port Non-Transparent
PCI Express® Switch
Phy
Route Table
SerDes
Logical
Layer
Figure 1 Internal Block Diagram
Phy
24 PCI Express Lanes
Multiplexer / Demultiplexer
3-Port Switch Core
Transaction Layer
Data Link Layer
SerDes
Logical
Layer
Phy
1 of 31
...
SerDes
Logical
Arbitration
– Port arbitration schemes utilizing round robin
– Supports automatic per port link width negotiation (x8, x4, x2,
– Static lane reversal on all ports
– Automatic polarity inversion on all lanes
– Supports locked transactions, allowing use with legacy soft-
– Ability to load device configuration from serial EEPROM
– Ability to control device via SMBus
– Crosslink support on NTB port
– Four mapping windows supported
– Interprocessor communication
– Allows up to sixteen masters to communicate through the non-
– No limit on the number of supported outstanding transactions
– Completely symmetric non-transparent bridge operation
– Supports direct connection to a transparent or non-transparent
Layer
Phy
Flexible Architecture with Numerous Configuration Options
Non-Transparent Port
Port
or x1)
ware
• Each may be configured as a 32-bit memory or I/O window
• May be paired to form a 64-bit memory window
• Thirty-two inbound and outbound doorbells
• Four inbound and outbound message registers
• Two shared scratchpad registers
transparent port
through the non-transparent bridge
allows similar/same configuration software to be run
port of another switch
SerDes
Logical
Layer
Phy
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
SerDes
Logical
Layer
Phy
Scheduler
...
89HPES24NT3
SerDes
Transparent
Logical
Layer
Phy
Bridge
Non-
January 5, 2009
Data Sheet
DSC 6925

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IDT89HPES24NT3ZBBX Summary of contents

Page 1

Device Overview The 89HPES24NT3 is a member of the IDT PRECISE™ family of PCI Express® switching solutions offering the next-generation I/O inter- connect standard. The PES24NT3 is a 24-lane, 3-port peripheral chip that performs PCI Express Base switching with ...

Page 2

IDT 89HPES24NT3 Data Sheet ◆ Highly Integrated Solution – Requires no external components – Incorporates on-chip internal memory for packet buffering and queueing – Integrates twenty-four 2.5 Gbps embedded full duplex SerDes, 8B/10B encoder/decoder (no separate transceivers needed) ◆ Reliability, ...

Page 3

IDT 89HPES24NT3 Data Sheet PCIe System Interconnect Switch To Server CPU CPU PES24NT3 PES24NT3 PCIe System Interconnect Switch Embedded Embedded CPU CPU FC SATA / SAS Figure 2 PCIe System Interconnect Architecture Block Diagram Controller 1 CPU Cache Maint. & ...

Page 4

IDT 89HPES24NT3 Data Sheet Pin Description The following tables list the functions of the pins provided on the PES24NT3. Some of the functions listed may be multiplexed onto the same pin. The active polarity of a signal is defined using ...

Page 5

IDT 89HPES24NT3 Data Sheet Signal SSMBADDR[5,3:1] SSMBCLK SSMBDAT Signal GPIO[0] GPIO[1] GPIO[2] GPIO[3] GPIO[4] GPIO[5] GPIO[6] GPIO[7] Type Name/Description I Slave SMBus Address. These pins determine the SMBus address to which the slave SMBus interface responds. I/O Slave SMBus Clock. ...

Page 6

IDT 89HPES24NT3 Data Sheet Signal CCLKDS CCLKUS MSMBSMODE PENTBRSTN PERSTN RSTHALT SWMODE[3:0] Signal JTAG_TCK JTAG_TDI Type Name/Description I Common Clock Downstream. When the CCLKDS pin is asserted, it indi- cates that a common clock is being used between the downstream ...

Page 7

IDT 89HPES24NT3 Data Sheet Signal JTAG_TDO JTAG_TMS JTAG_TRST_N Signal V CORE APE Type Name/Description O JTAG Data Output. This is the serial data shifted out from ...

Page 8

IDT 89HPES24NT3 Data Sheet Pin Characteristics Note: Some input pads of the PES24NT3 do not contain internal pull-ups or pull-downs. Unused inputs should be tied off to appropriate levels. This is especially critical for unused control signal inputs which, if ...

Page 9

IDT 89HPES24NT3 Data Sheet Function JTAG JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N Pin Name Type Buffer I LVTTL Table 7 Pin Characteristics (Part Internal I/O Type Notes Resistor STI pull-up pull-up ...

Page 10

IDT 89HPES24NT3 Data Sheet Logic Diagram — PES24NT3 Reference Clocks PCI Express Switch SerDes Input Port A PCI Express Switch SerDes Input Port B PCI Express Switch SerDes Input Port C Master SMBus Interface SSMBADDR[5,3:1] Slave SMBus Interface System Functions ...

Page 11

IDT 89HPES24NT3 Data Sheet System Clock Parameters Values based on systems running at recommended supply voltages and operating temperatures, as shown in Tables 12 and 13. Parameter Refclk Input reference clock frequency range FREQ 2 Refclk Duty cycle of input ...

Page 12

IDT 89HPES24NT3 Data Sheet Parameter T Max time between jitter median & max deviation RX-EYE-MEDIUM TO MAX JITTER T Unexpected Idle Enter Detect Threshold Integration Time RX-IDLE-DET-DIFF- ENTER TIME T Lane to lane input skew RX-SKEW 1. Minimum, Typical, and ...

Page 13

IDT 89HPES24NT3 Data Sheet JTAG_TCK JTAG_TDI JTAG_TMS JTAG_TDO JTAG_TRST_N Recommended Operating Supply Voltages Symbol Parameter V CORE Internal logic supply DD V I/O I/O supply except for SerDes LVPECL/CML PCI Express Digital Power DD V APE PCI ...

Page 14

IDT 89HPES24NT3 Data Sheet Recommended Operating Temperature Power Consumption Typical power is measured under the following conditions: 25°C Ambient, 35% total link usage on all ports, typical voltages defined in Table 14. Maximum power is measured under the following conditions: ...

Page 15

IDT 89HPES24NT3 Data Sheet DC Electrical Characteristics Values based on systems running at recommended supply voltages, as shown in Table 12. Note: See Table 7, Pin Characteristics, for a complete I/O listing. I/O Type Parameter Serial Link PCIe Transmit V ...

Page 16

IDT 89HPES24NT3 Data Sheet I/O Type Parameter Other I/Os LOW Drive I OL Output I OH High Drive I OL Output I OH Schmitt Trig ger Input V IH (STI) Input Capacitance C IN ...

Page 17

IDT 89HPES24NT3 Data Sheet Package Pinout — 420-BGA Signal Pinout for PES24NT3 The following table lists the pin numbers and signal names for the PES24NT3 device. Pin Function Alt Pin B10 ...

Page 18

IDT 89HPES24NT3 Data Sheet Pin Function Alt Pin F23 F24 V APE K5 DD F25 V CORE K22 DD F26 V CORE K23 DD G1 PEBTN07 K24 G2 PEBTP07 K25 K26 DD G4 PEBRN07 ...

Page 19

IDT 89HPES24NT3 Data Sheet Pin Function Alt Pin AA5 PEBRP00 AC3 AA22 PECRP07 AC4 AA23 PECRN07 AC5 AA24 V PE AC6 DD AA25 PECTP07 AC7 AA26 PECTN07 AC8 AB1 V AC9 SS AB2 V AC10 SS AB3 V CORE AC11 ...

Page 20

IDT 89HPES24NT3 Data Sheet Power Pins V Core V Core C14 F25 C16 F26 M26 D8 P1 D10 P26 D12 T1 D13 T26 D15 V1 D17 V26 D18 AB3 D19 AB4 D21 AB5 ...

Page 21

IDT 89HPES24NT3 Data Sheet Ground Pins A23 A24 A25 A26 B1 B2 B25 B26 C10 C12 C18 C20 C22 C24 C25 D11 ...

Page 22

IDT 89HPES24NT3 Data Sheet Alternate Signal Functions Signals Listed Alphabetically Signal Name CCLKDS CCLKUS GPIO_00 GPIO_01 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 JTAG_TCK JTAG_TDI JTAG_TMS JTAG-TDO JTAG-TRST_N MSMBADDR_1 MSMBADDR_2 MSMBADDR_3 MSMBADDR_4 MSMBCLK MSMBDAT MSMBSMODE Pin GPIO Alternate B18 GPIO[0] PEBRSTN ...

Page 23

IDT 89HPES24NT3 Data Sheet Signal Name PEALREV PEARN00 PEARN01 PEARN02 PEARN03 PEARN04 PEARN05 PEARN06 PEARN07 PEARP00 PEARP01 PEARP02 PEARP03 PEARP04 PEARP05 PEARP06 PEARP07 PEATN00 PEATN01 PEATN02 PEATN03 PEATN04 PEATN05 PEATN06 PEATN07 PEATP00 PEATP01 PEATP02 PEATP03 PEATP04 PEATP05 PEATP06 PEATP07 PEBLREV ...

Page 24

IDT 89HPES24NT3 Data Sheet Signal Name PEBRN02 PEBRN03 PEBRN04 PEBRN05 PEBRN06 PEBRN07 PEBRP00 PEBRP01 PEBRP02 PEBRP03 PEBRP04 PEBRP05 PEBRP06 PEBRP07 PEBTN00 PEBTN01 PEBTN02 PEBTN03 PEBTN04 PEBTN05 PEBTN06 PEBTN07 PEBTP00 PEBTP01 PEBTP02 PEBTP03 PEBTP04 PEBTP05 PEBTP06 PEBTP07 PECLREV PECRN00 PECRN01 PECRN02 ...

Page 25

IDT 89HPES24NT3 Data Sheet Signal Name PECRN05 PECRN06 PECRN07 PECRP00 PECRP01 PECRP02 PECRP03 PECRP04 PECRP05 PECRP06 PECRP07 PECTN00 PECTN01 PECTN02 PECTN03 PECTN04 PECTN05 PECTN06 PECTN07 PECTP00 PECTP01 PECTP02 PECTP03 PECTP04 PECTP05 PECTP06 PECTP07 PENTBRSTN PEREFCLKN0 PEREFCLKN1 PEREFCLKP0 PEREFCLKP1 PERSTN REFCLKM ...

Page 26

IDT 89HPES24NT3 Data Sheet Signal Name SSMBADDR_1 SSMBADDR_2 SSMBADDR_3 SSMBADDR_5 SSMBCLK SSMBDAT SWMODE_0 SWMODE_1 SWMODE_2 SWMODE_3 V CORE APE I/O Type Location B10 ...

Page 27

IDT 89HPES24NT3 Data Sheet PES24NT3 Pinout — Top View ...

Page 28

IDT 89HPES24NT3 Data Sheet PES24NT3 Package Drawing — 420-Pin BX420/BXG420 January 5, 2009 ...

Page 29

IDT 89HPES24NT3 Data Sheet PES24NT3 Package Drawing — Page Two January 5, 2009 ...

Page 30

IDT 89HPES24NT3 Data Sheet Revision History April 15, 2008: Initial publication of data sheet. January 5, 2009: On the Ordering Information page, changed silicon revision from January 5, 2009 ...

Page 31

IDT 89HPES24NT3 Data Sheet Ordering Information A AAA NN Product Operating Device Family Family Voltage Valid Combinations 89HPES24NT3ZBBX 420-pin BX420 package, Commercial Temperature 89HPES24NT3ZBBXG 420-pin Green BX420 package, Commercial Temperature CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA ...

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