IDT89HPES24T6ZGBX IDT, Integrated Device Technology Inc, IDT89HPES24T6ZGBX Datasheet - Page 6

• Manufacturer Part Number: IDT89HPES24T6ZGBX
• Description: IC PCI SW 24LANE 6PORT 420-SBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT89HPES24T6ZGBX

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 89HPES24T6ZGBX

IDT 89HPES24T6 Data Sheet
MSMBSMODE
P01MERGEN
P23MERGEN
GPIO[10]
Signal
Signal
CCLKDS
CCLKUS
GPIO[6]
GPIO[7]
GPIO[8]
GPIO[9]
Type
Type
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
Table 4 General Purpose I/O Pins (Part 2 of 2)
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: GPEN
Alternate function pin type: Output
Alternate function: General Purpose Event (GPE) output
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: P1RSTN
Alternate function pin type: Output
Alternate function: Reset output for downstream port 1
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: P3RSTN
Alternate function pin type: Output
Alternate function: Reset output for downstream port 3
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: P5RSTN
Alternate function pin type: Output
Alternate function: Reset output for downstream port 5
Common Clock Downstream. When the CCLKDS pin is asserted, it indi-
cates that a common clock is being used between the downstream device
and the downstream port.
Common Clock Upstream. When the CCLKUS pin is asserted, it indi-
cates that a common clock is being used between the upstream device and
the upstream port.
Master SMBus Slow Mode. The assertion of this pin indicates that the
master SMBus should operate at 100 KHz instead of 400 KHz. This value
may not be overridden.
Port 0 and 1 Merge. P01MERGEN is an active low signal. It is pulled low
internally via a 251K ohm resistor.
When this pin is low, port 0 is merged with port 1 to form a single x8 port.
The Serdes lanes associated with port 1 become lanes 4 through 7 of port
0. When this pin is high, port 0 and port 1 are not merged, and each oper-
ates as a single x4 port
Port 2 and 3 Merge. P23MERGEN is an active low signal. It is pulled low
internally via a 251K ohm resistor.
When this pin is low, port 2 is merged with port 3 to form a single x8 port.
The Serdes lanes associated with port 3 become lanes 4 through 7 of port
2. When this pin is high, port 2 and port 3 are not merged, and each oper-
ates as a single x4 port.
Table 5 System Pins (Part 1 of 2)
6 of 33
Name/Description
Name/Description
April 23, 2008