DS2413Q+T&R Maxim Integrated Products, DS2413Q+T&R Datasheet - Page 4

• Manufacturer Part Number: DS2413Q+T&R
• Description: IC SWITCH 2CH ADDRESS 6-TDFN
• Manufacturer: Maxim Integrated Products

Specifications of DS2413Q+T&R

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN DESCRIPTION
DESCRIPTION
The DS2413 combines two PIO pins and a fully featured 1-Wire interface in a single chip. PIO outputs are open-
drain, operate at up to 28V and provide an on resistance of 20 max. A robust communication protocol ensures
that PIO output changes occur error-free. Each DS2413 has a Registration Number that is 64 bits long. The
Registration Number guarantees unique identification and is used to address the device in a multidrop 1-Wire
network environment, where multiple devices reside on a common 1-Wire bus and operate independently of each
other. Device power is supplied parasitically from the 1-Wire bus. The DS2413’s applications of include accessory
identification and control, system monitoring, and general-purpose input/output.
OVERVIEW
The block diagram in Figure 1 shows the relationships between the major sections of the DS2413. The DS2413
has two main components: 64-bit Registration Number, and PIO Control. The hierarchical structure of the 1-Wire
protocol is shown in Figure 2. The bus master must first provide one of the seven ROM Function Commands, 1)
Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip ROM, 5) Resume, 6) Overdrive-Skip ROM or 7) Overdrive-
Match ROM. Upon completion of an Overdrive ROM command byte executed at standard speed, the device enters
Overdrive mode where all subsequent communication occurs at a higher speed. The protocol required for these
ROM function commands is described in Figure 10. After a ROM function command is successfully executed, the
PIO functions become accessible and the master may provide one of the two PIO Function commands. The
protocol for these commands is described in Figure 6. All data is read and written least significant bit first.
Figure 1. Block Diagram
t
t
t
t
t
W0L
SLOT
RSTL
PDH
PDL
NAME
GND1
GND2
PIOA
PIOB
GND
PARAMETER
NC
IO
(incl. t
REC
TSOC PIN #
)
—
2
6
4
1
5
3
STANDARD SPEED
480µs
61µs
15µs
60µs
60µs
IO
MIN
TDFN PIN #
EP
2
4
6
3
5
1
(undef.)
(undef.)
240µs
120µs
LEGACY VALUES
MAX
60µs
Interface
1-Wire
1-Wire bus interface. Open-drain, requires external pullup resistor.
Programmable I/O pin, open-drain with weak pulldown, power-on
default is off (PIOA = 1).
Programmable I/O pin, open-drain with weak pulldown, power-on
default is off (PIOB = 1).
Ground reference 1
Ground reference 2; both GND pins must be connected in the
application.
Not connected
Exposed Paddle (TDFN only). Solder evenly to the board’s ground
plane for proper operation. See
information.
Internal V
OVERDRIVE SPEED
64-Bit Registration
48µs
MIN
7µs
2µs
8µs
6µs
Number
DD
4 of 18
Control
PIO
(undef.)
MAX
80µs
24µs
16µs
6µs
STANDARD SPEED
600µs
67µs
15µs
60µs
62µs
MIN
FUNCTION
Application Note 3273
(undef.)
960µs
120µs
260µs
DS2413 VALUES
MAX
68µs
PIOB
PIOA
OVERDRIVE SPEED
10µs
63µs
MIN
2µs
8µs
8µs
for additional
(undef.)
8.2µs
MAX
80µs
32µs
16µs