IL516E NVE, IL516E Datasheet - Page 9

IC DGTL ISOL 4CH 2MBPS 16-SOIC

IL516E

Manufacturer Part Number
IL516E
Description
IC DGTL ISOL 4CH 2MBPS 16-SOIC
Manufacturer
NVE
Series
IsoLoop®r
Datasheet

Specifications of IL516E

Inputs - Side 1/side 2
2/2
Number Of Channels
4
Isolation Rating
2500Vrms
Voltage - Supply
3 V ~ 5.5 V
Data Rate
2Mbps
Propagation Delay
25ns
Output Type
Logic
Package / Case
16-SOIC (0.300", 7.5mm Width)
Operating Temperature
-40°C ~ 85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
390-1121
390-1121-5
390-1121
Application Information
Electrostatic Discharge Sensitivity
This product has been tested for electrostatic sensitivity to the
limits stated in the specifications. However, NVE recommends that
all integrated circuits be handled with appropriate care to avoid
damage. Damage caused by inappropriate handling or storage could
range from performance degradation to complete failure.
Electromagnetic Compatibility
IsoLoop Isolators have the lowest EMC footprint of any isolation
technology. IsoLoop Isolators’ Wheatstone bridge configuration
and differential magnetic field signaling ensure excellent EMC
performance against all relevant standards.
Additionally, on the IL510 and IL515, the internal clock can be
disabled for even better EMC performance.
These isolators are fully compliant with generic EMC standards
EN50081, EN50082-1 and the umbrella line-voltage standard for
Information Technology Equipment (ITE) EN61000. NVE has
completed compliance tests in the categories below:
EN50081-1
EN50082-2: Industrial Environment
ENV50204
Immunity to external magnetic fields is even higher if the field
direction is “end-to-end” rather than to “pin-to-pin” as shown in the
diagram below:
Dynamic Power Consumption
IsoLoop Isolators achieve their low power consumption from the
way they transmit data across the isolation barrier. A magnetic field
is created around the GMR Wheatstone bridge by detecting the
edge transitions of the input logic signal and converting them to
narrow current pulses. Depending on the direction of the magnetic
field, the bridge causes the output comparator to switch following
the input logic signal. Since the current pulses are narrow, about
2.5 ns, the power consumption is independent of mark-to-space
ratio and solely dependent on frequency. This has obvious
advantages over optocouplers, which have power consumption
heavily dependent on mark-to-space ratio.
Residential, Commercial & Light Industrial
Methods EN55022, EN55014
Methods EN61000-4-2 (ESD), EN61000-4-3 (Electromagnetic
Field Immunity), EN61000-4-4 (Electrical Transient Immunity),
EN61000-4-6 (RFI Immunity), EN61000-4-8 (Power Frequency
Magnetic Field Immunity), EN61000-4-9 (Pulsed Magnetic
Field), EN61000-4-10 (Damped Oscillatory Magnetic Field)
Radiated Field from Digital Telephones (Immunity Test)
Cross-axis Field Direction
IL510/IL511/IL514/IL515/IL516
9
Power Supply Decoupling
Both power supplies to these devices should be decoupled with low
ESR ceramic capacitors of at least 47 nF. Capacitors must be
located as close as possible to the V
DC Correctness, EMC, and the SYNC Function
NVE digital isolators have the lowest EMC noise signature of any
high-speed digital isolator on the market today because of the dc
nature of the GMR sensors used. It is perhaps fair to include opto-
couplers in that dc category too, but their limited parametric
performance, physically large size, and wear-out problems
effectively limit side by side comparisons between NVE’s isolators
and isolators coupled with RF, matched capacitors, or transformers.
IL500-Series isolators has an internal refresh clock which ensure
the synchronization of input and output within 9 μs of the supply
passing the 1.5 V threshold. The IL510 and IL515 allow external
control of the refresh clock through the SYNC pin thereby further
lowering the EMC footprint. This can be advantageous in
applications such as hi-fi, motor control and power conversion.
The isolators can be used with Power on Reset (POR) circuits
common in microcontroller applications, as the means of ensuring
the output of the device is in the same state as the input a short time
after power up. Figure 1 shows a practical Power on Reset circuit:
After POR, the SYNC line goes high, the internal clock is disabled,
and the EMC signature is optimized. Decoupling capacitors are
omitted for clarity.
SET
Fig. 1. Typical Power On Reset Circuit for IL510
POR
SYNC
V
IN
dd1
1
2
3
4
DD
pins.
IL510
8
7
6
5
V
OE
OUT
V
dd2

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