ADUM3211BRZ Analog Devices Inc, ADUM3211BRZ Datasheet - Page 16

• Manufacturer Part Number: ADUM3211BRZ
• Description: ISOLATOR DGTL 2.5KVRMS 2CH 8SOIC
• Manufacturer: Analog Devices Inc
• Series: iCoupler®r

Specifications of ADUM3211BRZ

• Propagation Delay: 50ns
• Inputs - Side 1/side 2: 1/1
• Number Of Channels: 2
• Isolation Rating: 2500Vrms
• Voltage - Supply: 2.7 V ~ 5.5 V
• Data Rate: 10Mbps
• Output Type: Logic
• Package / Case: 8-SOIC (3.9mm Width)
• Operating Temperature: -40°C ~ 105°C
• No. Of Channels: 2
• Supply Current: 3.1mA
• Supply Voltage Range: 2.7V To 5.5V
• Digital Ic Case Style: SOIC
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +105°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuM3210/ADuM3211
APPLICATIONS INFORMATION
PC BOARD LAYOUT
The ADuM321x digital isolators require no external interface
circuitry for the logic interfaces. Power supply bypassing is
strongly recommended at the input and output supply pins.
The capacitor value should be between 0.01 μF and 0.1 μF.
The total lead length between both ends of the capacitor
and the input power supply pin should not exceed 20 mm.
SYSTEM-LEVEL ESD CONSIDERATIONS AND
ENHANCEMENTS
System-level ESD reliability (for example, per IEC 61000-4-x)
is highly dependent on system design, which varies widely by
application. The ADuM321x incorporate many enhancements
to make ESD reliability less dependent on system design. The
enhancements include:
•
•
•
•
•
While the ADuM321x improves system-level ESD reliability,
it is no substitute for a robust system-level design. For detailed
recommendations on board layout and system-level design,
see AN-793 Application Note, ESD/Latch-Up Considerations
with iCoupler Isolation Products.
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a logic low output can differ from the propagation
delay to a logic high output.
Pulse width distortion is the maximum difference between
these two propagation delay values and is an indication of
how accurately the input signal timing is preserved.
Channel-to-channel matching refers to the maximum amount
that the propagation delay differs between channels within a
single ADuM321x component.
Propagation delay skew refers to the maximum amount that
the propagation delay differs between multiple ADuM321x
components operating under the same conditions.
INPUT (V
OUTPUT (V
ESD protection cells were added to all input/output interfaces.
Key metal trace resistances reduced using wider geometry
and paralleling of lines with vias.
The SCR effect inherent in CMOS devices is minimized
by use of a guarding and isolation technique between the
PMOS and NMOS devices.
Areas of high electric field concentration are eliminated
using 45° corners on metal traces.
Supply pin overvoltage is prevented with larger ESD
clamps between each supply pin and its respective ground.
Ix
)
Ox
)
Figure 12. Propagation Delay Parameters
t
PLH
t
PHL
50%
50%
Rev. C | Page 16 of 20
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions of more than 2 μs at the input, a periodic set of
refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output. If the decoder receives
no internal pulses for more than approximately 5 μs, the input
side is assumed to be unpowered or nonfunctional, in which
case, the isolator output is forced to a default state (see Table 34
and Table 35) by the watchdog timer circuit.
The ADuM321x is immune to external magnetic fields. The
limitation on the ADuM321x magnetic field immunity is set
by the condition in which induced voltage in the transformer
receiving coil is sufficiently large to either falsely set or reset
the decoder. The following analysis defines the conditions
under which this can occur. The 3 V operating condition of
the ADuM321x is examined because it represents the most
susceptible mode of operation.
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V,
therefore establishing a 0.5 V margin in which induced voltages
can be tolerated. The voltage induced across the receiving coil is
given by
where:
β is the magnetic flux density (gauss).
N is the number of turns in the receiving coil.
r
Given the geometry of the receiving coil in the ADuM321x
and an imposed requirement that the induced voltage is at
most 50% of the 0.5 V margin at the decoder, a maximum
allowable magnetic field is calculated as shown in Figure 13.
n
is the radius of the nth turn in the receiving coil (cm).
V = (−dβ/dt) ∑π r
0.001
0.01
Figure 13. Maximum Allowable External Magnetic Flux Density
100
0.1
10
1
1k
10k
MAGNETIC FIELD FREQUENCY (Hz)
n
2
, n = 1, 2, ... , N
100k
1M
10M
100M