MT36VDDF25672G-40BD2 Micron Technology Inc, MT36VDDF25672G-40BD2 Datasheet - Page 14

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MT36VDDF25672G-40BD2

Manufacturer Part Number
MT36VDDF25672G-40BD2
Description
MODULE DDR SDRAM 2GB 184-DIMM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT36VDDF25672G-40BD2

Memory Type
DDR SDRAM
Memory Size
2GB
Speed
200MHz
Package / Case
184-DIMM
Main Category
DRAM Module
Sub-category
DDR SDRAM
Module Type
184RDIMM
Device Core Size
72b
Organization
256Mx72
Total Density
2GByte
Chip Density
512Mb
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
2.5V
Operating Current
3.6A
Number Of Elements
36
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
184
Mounting
Socket
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
557-1120
Table 11:
PDF: 09005aef80772fd2/Source: 09005aef8075ebf6
DDF36C128_256x72.fm - Rev. G 9/08 EN
Parameter/Condition
Operating one bank active-precharge current:
t
Address and control inputs changing once every two clock cycles
Operating one bank active-read-precharge current: BL = 2;
t
changing once per clock cycle
Precharge power-down standby current: All device banks idle; Power-
down mode;
Idle standby current: CS# = HIGH; All device banks idle;
CKE = HIGH; Address and other control inputs changing once per clock
cycle; V
Active power-down standby current: One device bank active; Power-
down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device bank
active;
twice per clock cycle; Address and other control inputs changing once per
clock cycle
Operating burst read current: BL = 2; Continuous burst reads; One
device bank active; Address and control inputs changing once per clock
cycle;
Operating burst write current: BL = 2; Continuous burst writes; One
device bank active; Address and control inputs changing once per clock
cycle;
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank
interleaving reads (BL = 4) with auto precharge;
t
READ or WRITE commands
CK =
RC =
CK =
t
t
t
t
t
RC (MIN);
CK (MIN); DQ and DQS inputs changing once per clock cycle;
CK =
CK =
CK (MIN); Address and control inputs change only during active
t
IN
RC =
= V
t
t
REF
CK (MIN); I
CK (MIN); DQ and DQS inputs changing twice per clock cycle
t
t
t
RAS (MAX);
I
Values are for the MT46V128M4 DDR SDRAM only and are computed from values specified in the
512Mb (128 Meg x 4) component data sheet
CK =
CK =
DD
for DQ and DQS
t
CK =
Specifications and Conditions – 2GB
t
t
Notes:
CK (MIN); CKE = LOW
CK (MIN); CKE = LOW
t
CK (MIN); I
OUT
t
CK =
= 0mA
1. Value calculated as one module rank in this operating condition; all other module ranks are
2. Value calculated reflects all module ranks in this operating condition.
in I
t
CK (MIN); DQ and DQS inputs changing
OUT
DD
2P (CKE LOW) mode.
= 0mA; Address and control inputs
t
1GB, 2GB (x72, ECC, DR) 184-Pin DDR SDRAM RDIMM
RC =
t
RC =
t
t
RFC =
RFC = 7.8125µs
t
RC (MIN);
t
t
CK =
RC (MIN);
t
RFC (MIN)
14
t
CK (MIN);
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Symbol -40B
I
I
I
I
I
I
I
DD
DD
DD
I
I
DD
DD
DD
I
I
I
DD
DD
DD
DD
DD
DD
4W
3N
5A
2P
3P
4R
2F
0
1
5
6
7
1
1
2
2
1
2
2
2
1
2
2
1
12,420 10,440 10,440 10,080
2,880
3,420
1,980
1,620
2,160
3,510
3,600
8,190
180
396
180
Electrical Specifications
2,430
2,970
1,620
1,260
1,800
3,060
3,240
7,380
-335
180
360
180
©2002 Micron Technology, Inc. All rights reserved.
2,430
2,970
1,620
1,260
1,800
3,060
2,880
7,290
-262
180
360
180
-26A/
2,160
2,700
1,440
1,080
1,620
2,700
2,520
6,390
-265
180
360
180
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA

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