PL-BYTEBLASTER2N Altera, PL-BYTEBLASTER2N Datasheet - Page 18

• Manufacturer Part Number: PL-BYTEBLASTER2N
• Description: CABLE PROGRAMMING PARALLEL PORT
• Manufacturer: Altera
• Series: ByteBlaster™r

Specifications of PL-BYTEBLASTER2N

• Accessory Type: Download Cable
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Ic Product Type: Debugger / Programmer
• Kit Contents: Device, Cable, Guides
• Rohs Compliant: Yes
• For Use With/related Products: EPCS Serial Configuration Devices
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1289; PL-BYTEBLASTER2

2–2
Table 2–1. ByteBlaster II V
Cable-to-Board Connection
Figure 2–1. ByteBlaster II Block Diagram
ByteBlaster II 25-Pin Header Connection
Table 2–2. ByteBlaster II 25-Pin Header Pin-Outs
ByteBlaster II Download Cable User Guide
EPC4, EPC8, and EPC16 devices
EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128 devices
Pin
2
3
4
DCLK
nCONFIG
nCS
Signal Name
18 to 25
15
14
10
11
13
2
3
4
5
8
6
The ByteBlaster II cable has a standard parallel printer plug that connects to the PC.
Figure 2–1
The 25-pin male header connects to a parallel port with a standard parallel cable.
Table 2–2
GND
AS Mode
CC(TRGT)
Clock signal
Configuration control
Serial configuration
device chip select
Description
V CC
identifies the plug pin names and the corresponding programming modes.
Pin Voltage Requirements
shows a block diagram of the ByteBlaster II download cable.
TRI
Series Resistors for Signal Quality
TRI
and Parallel Port Protection
DCLK
nCONFIG
Signal Name
(Part 1 of 2)
(Typically 100 Ω)
TRI
—
TRI
PS Mode
(Part 2 of 2)
Clock signal
Configuration
control
No connect
TRI
Description
3.3 V
3.3 V
V CC
TCK
TMS
Chapter 2: ByteBlaster II Specifications
Signal Name
—
© July 2008 Altera Corporation
GND
JTAG Mode
2, 10
ByteBlaster II Connections
4
1
5
8
6
9
3
7
Clock signal
JTAG state
machine control
No connect
Description