ISL54200EVAL1Z Intersil, ISL54200EVAL1Z Datasheet - Page 4

• Manufacturer Part Number: ISL54200EVAL1Z
• Description: EVALUATION BOARD FOR ISL54200
• Manufacturer: Intersil

Specifications of ISL54200EVAL1Z

• Main Purpose: Interface, 2:1 Multiplexer
• Embedded: No
• Utilized Ic / Part: ISL54200
• Primary Attributes: 2 x SPDT Analog Switch
• Secondary Attributes: 2.7 V ~ 5.5 V Supply
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Specifications - 2.7V to 3.6V Supply
ANALOG SWITCH CHARACTERISTICS
NC Switches (FSD1, FSD2)
Analog Signal Range, V
ON-Resistance, r
r
Channels, Δr
r
OFF Leakage Current, I
ON Leakage Current, I
NO Switches (HSD1, HSD2)
Analog Signal Range, V
ON
ON
Absolute Maximum Ratings
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V
Input Voltages
Output Voltages
Continuous Current (HSD2, HSD1, FSD2, FSD1) . . . ±40mA
Peak Current (HSD2, HSD1, FSD2, FSD1)
ESD Rating:
Latch-up Tested per JEDEC; Class II Level A . . . . . at +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
10. For θ
6. Signals on FSD1, FSD2, HSD1, HSD2, COMD1, COMD2, EN, IN exceeding V
7. θ
8. For θ
9. θ
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . ±100mA
FSD2, FSD1, HSD2, HSD1 (Note 6) . - 1V to ((V
IN, EN (Note 6) . . . . . . . . . . . . . . -0.3V to ((V
COMD1, COMD2 (Note 6) . . . . . . . . . . . . . . . . . -1V to 5V
HBM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >7kV
MM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >400V
CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >1.4kV
Matching Between
Flatness, r
current to maximum current ratings.
TB379 for details.
features. See Tech Brief TB379.
JA
JA
PARAMETER
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
JC
JC
ON
, the “case temp” location is taken at the package top center.
, the “case temp” location is the center of the exposed metal pad on the package underside.
FLAT(ON)
ON
FSX(ON)
ANALOG
FSX(OFF)
ANALOG
4
V
V
V
V
V
range of 0V to 3.3V, (Note 15)
V
V
V+ = 3.6V, IN = 3.6V, EN = 0V and 3.6V, V
= 0.3V, 3V, V
V+ = 3.6V, IN = 0V, EN = 3.6V, V
3V, V
V
DD
FSD1
DD
FSD1
DD
FSD1
DD
DD
= 3.3V, IN = 0.5V, EN = 1.4V, I
= 3.3V, IN = 0.5V, EN = 1.4V, I
= 3.3V, IN = 0.5V, EN = 1.4V, I
= 3.3V, IN = 0V, EN = 3.3V
= 3.3V, IN = 3.3V, EN = 3.3V
FSX
or V
or V
or V
= 0.3V, 3V
FSD2
FSD2
FSD2
TEST CONDITIONS
FSX
= 0V to 3.3V, (See Figure 4)
= Voltage at max r
= 0V to 3.3V, (Note 14)
= 3V, 0.3V
DD
DD
Test Conditions: V
V
face limits apply over the operating temperature range, -40°C to
+85°C.
) +0.3V)
) +0.3V)
ENH
ISL54200
ISL54200
= 1.4V, V
COMx
COMx
COMx
ON
COMx
Thermal Information
Thermal Resistance (Typical)
Maximum Junction Temperature (Plastic Package). .
Maximum Storage Temperature Range. . . . . -65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . .see link below
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C
V
over signal
DD
ENL
10 Ld µTQFN (Notes 7, 8) . . . . . . .
10 Ld TDFN (Notes 9, 10) . . . . . . .
= 40mA,
= 40mA,
= 40mA,
= 0.3V,
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Supply Voltage Range . . . . . . . . . . . . . . . 2.7V to 5.5V
DD
COMx
= 0.5V, (Note 11), Unless Otherwise Specified. Bold-
= +3.3V, GND = 0V, V
DD
TEMP
(°C)
+25
+25
+25
+25
+25
Full
Full
Full
Full
Full
Full
Full
or GND by specified amount are clamped. Limit
(Notes 12, 13) TYP
MIN
-70
-70
-20
-20
0
0
-
-
-
-
-
-
INH
= 1.4V, V
0.1
7
4
2
2
-
-
-
-
-
-
-
θ
JA
(Notes 12, 13) UNITS
(°C/W) θ
145
55
INL
MAX
V
0.35
V
0.4
15
70
70
10
20
20
DD
DD
6
8
= 0.5V,
June 17, 2010
JC
(°C/W)
16.5
+150°C
FN6408.2
90
nA
nA
nA
nA
V
Ω
Ω
Ω
Ω
Ω
Ω
V