SI3056PPT1-EVB Silicon Laboratories Inc, SI3056PPT1-EVB Datasheet - Page 32

• Manufacturer Part Number: SI3056PPT1-EVB
• Description: BOARD EVAL FOR DAA SI3056/SI3019
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3056PPT1-EVB

• Main Purpose: Telecom, Data Acquisition Arrangement (DAA)
• Utilized Ic / Part: Si3056
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TCK
TDO
TMS
TDI
R51
1K
R56
1K
0.1 uF
C31
R39
1K
Vio
Use Socket for EPC1441_3.
Mill-Max 110-99-308-41-001
R40
1K
Vio
Master w/ slaves
Master Blaster Header
EPC1PC8
Board Config.
U5
Stand Alone
nCASC
DCLK
DATA
Slave
nCS
OE
1
3
5
7
9
HEADER 5X2
JP14
2
1
3
4
6
10
2
4
6
8
Vio
TCK
mSel0
GND
GND
Vio
Vio
mSel1
mSel1
JP10
GND
GND
Vio
Vio
10
1
2
3
4
5
6
7
8
9
M1
GND
Use Socket for EPC2LC20.
Mill-Max 540-99-020-400000
GND
Vio
Install R57 only if
U8 is not populated
TDO
DATA
TCK
DCLK
VCCSEL
NC1
NC2
OE
nCS
GND
mSel0
EPC2LC20
M0
JP9
GND
nINIT_CONF
Vio
Vio
R47
1K
R57
0K
U8
VPPSEL
Vio
nCASC
Vio
VCC
TMS
VPP
NC5
NC4
NC3
R48
1K
TDI
20
19
18
17
16
15
14
13
12
11
R49
1K
Figure 20. Si30xx Motherboard Schematic (3 of 3)
RGDT/FSD
OFHKb
MCLK
SCLK
FSYNCb
SDO
FC/RGDT
SDI
RESETb
SCLK_IN
FSD_OUT
pbRESETb
RESET_INb
FSYNC_INb
SDI_IN
TMS
R50
1K
M0
M1
TDI
VA
R41
10K
Vio
Vio
R42
10K
C32
0.1 uF
R43
10K
CFG Dev Select
modeSel0
modeSel1
R44
10K
OSC
109
110
111
112
113
114
116
124
126
125
105
141
142
144
106
122
128
143
107
108
10
12
13
17
18
19
20
21
22
23
26
27
28
29
39
38
37
36
33
32
31
30
54
56
55
34
77
76
35
74
8
9
1
7
2
I/O(1)
I/O(2)
I/O(3)
I/O(4)
I/O(5)
I/O(6)
I/O(7)
I/O(8)
I/O(9)
I/O(10)
I/O(11)
I/O(12)
I/O(13)
I/O(14)
I/O(15)
I/O(16)
I/O(17)
I/O(18)
I/O(19)
I/O(20)
I/O(21)
I/O(22)
I/O(23)
I/O(24)
DATA(1)
DATA(2)
DATA(3)
DATA(4)
DATA(5)
DATA(6)
DATA(7)
INPUT(1)
INPUT(2)
INPUT(3)
INPUT(4)
CLK(1)
CLK(2)
TCK
CLKUSR
TDI
TMS
NRS
NWS
NCS
NCE
DEV_CLRn
DEV_OE
MSEL0
MSEL1
CS
DCLK
DATA0
NSTATUS
CONF_DONE
NCONFIG
Vcore
U4
Vio
EP1K30TC144
RDYNBUSY
INIT_DONE
I/O(25)
I/O(26)
I/O(27)
I/O(28)
I/O(29)
I/O(30)
I/O(31)
I/O(32)
I/O(33)
I/O(34)
I/O(35)
I/O(36)
I/O(37)
I/O(38)
I/O(39)
I/O(40)
I/O(41)
I/O(42)
I/O(43)
I/O(44)
I/O(45)
I/O(46)
I/O(47)
I/O(48)
I/O(49)
I/O(50)
I/O(51)
I/O(52)
I/O(53)
I/O(54)
I/O(55)
I/O(56)
I/O(57)
I/O(58)
I/O(59)
I/O(60)
I/O(61)
I/O(62)
I/O(63)
I/O(64)
I/O(65)
I/O(66)
I/O(67)
I/O(68)
I/O(69)
I/O(70)
I/O(71)
I/O(72)
I/O(73)
I/O(74)
I/O(75)
I/O(76)
I/O(77)
I/O(78)
I/O(79)
I/O(80)
NCEO
TDO
41
42
43
44
46
47
48
49
51
59
60
62
63
64
65
67
68
69
70
72
73
78
79
80
81
82
83
86
87
88
89
90
91
92
95
96
97
98
99
100
101
102
117
118
119
120
121
130
131
132
133
135
136
137
138
140
3
4
14
11
mSCLK
m C1A
mS DI
m SDO
mM0
mM1
m OH
mRGDT
m FC
nDSTB
nWRITE
nASTB
nIRQ
nWAIT
mFS
mRST
s3
D0
c2
D1
D2
D3
D4
D5
D6
D7
s5
s4
R25
47K
TDO
Test Point Connector
R26
47K
1
3
5
7
9
HEADER 5X2
JP12
R14
47K
R27
47K
Vio
10
2
4
6
8
R15
47K
R28
47K
R16
47K
R29
47K
R17
47K
R30
47K
R18
47K
R31
47K
R19
47K
R32
47K
R20
47K
R33
47K
nWRITE
nIRQ
nWAIT
D0
D1
D2
D3
D4
D5
D6
D7
s5
s4
R21
47K
R34
47K
mFS
mRST
DG ND
mS DI
mM0
DG ND
m OH
m FC
Parallel Port Connector
11
13
15
17
19
21
23
25
1
3
5
7
9
R22
47K
R35
47K
Chip Signal Connector
HEADER 13X2
1
3
5
7
9
11
13
15
17
19
21
23
25
JP11
HEADER 8X2
JP13
1
3
5
7
9
11
13
15
R23
47K
R36
47K
10
12
14
16
10
12
14
16
18
20
22
24
26
2
4
6
8
2
4
6
8
R24
47K
R37
47K
2
4
6
8
10
12
14
16
18
20
22
24
26
R38
47K
mSCLK
m C1A
DG ND
m SDO
DG ND
mM1
DG ND
mRGDT
nDSTB
nASTB
s3
c2