USBN9604-HS-EB/NOPB National Semiconductor, USBN9604-HS-EB/NOPB Datasheet - Page 13

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USBN9604-HS-EB/NOPB

Manufacturer Part Number
USBN9604-HS-EB/NOPB
Description
KIT NODE CONTROLLER SAMPLE
Manufacturer
National Semiconductor
Series
USBN9604r
Datasheet

Specifications of USBN9604-HS-EB/NOPB

Main Purpose
Interface, USB 1.1 Host/Controller
Utilized Ic / Part
USBN 9603 and USBN 9604 Devices
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Other names
*USBN9604-HS-EB/NOPB
Q1476789
USBN9604-HS-EB
3.0 Parallel Interface
The parallel interface allows the device to function as a CPU or microcontroller peripheral. This interface type and its ad-
dressing mode (multiplexed or non-multiplexed) is determined via device input pins MODE0 and MODE1.
3.1 NON-MULTIPLEXED MODE
Non-multiplexed mode uses the control pins CS, RD, WR, the address pin A0 and the bidirectional data bus D7-0 as shown
in Figure 4. This mode is selected by tying both the MODE1 and MODE0 pins to GND.
The CPU has direct access to the DATA_IN, DATA_OUT and ADDR registers. Reading and writing data to the device can
be done either in standard access or burst mode. See Figure 5 for timing information.
D7-0
CS
A0
WR
RD
D7-0
WR
CS
RD
A0
Figure 5. Non-Multiplexed Mode Timing Diagram
Write Address
Figure 4. Non-Multiplexed Mode Block Diagram
Input
DATA_IN
DATA_OUT
ADDR
13
Read Data
Out
Data Out
Address
Data In
Burst Read Data
0x3F
0x00
Out
Register File
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