EVAL-AD7686CBZ Analog Devices Inc, EVAL-AD7686CBZ Datasheet - Page 5

• Manufacturer Part Number: EVAL-AD7686CBZ
• Description: BOARD EVALUATION FOR AD7686
• Manufacturer: Analog Devices Inc
• Series: PulSAR®r

Specifications of EVAL-AD7686CBZ

• Number Of Adc's: 1
• Number Of Bits: 16
• Sampling Rate (per Second): 500k
• Data Interface: Serial
• Inputs Per Adc: 1 Differential
• Input Range: ±VREF
• Power (typ) @ Conditions: 15mW @ 500kSPS, 5 V
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD7686
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Preliminary Technical Data
Table 1. Jumper Description
Jumper
Designation
JP1
JP2
JP3
JP4
JP5
JP6
JP7
JP8
JP9
JP10
JP11
JP13
JP25
Table 2. EVAL-AD768x/AD769x/AD794xCB Test Points
Test Point
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
Default position with
the control board
( Factory settings)
AMP+
AMP-
Unip or Diff (see text)
ADR43X
BUF
− 5 V
7 V
12 V
VDD
+VA,
+2.5V (for AD798x)
3.3 V
BUF+
BUF-
Mnemonic
GND
GND
SIG+
GND
REF
SDI
CNV
SCK
SDO
SDO2
BBUSY
GND
SIG-
Function
Selection of the IN+ analog signal of U1 and U8, ADC0 and ADC1.
Position AMP+ = the signal present on JP13, buffered through U6.
Position not in AMP+ = optional multiplexer output, DB, is used.
Selection of JP3 source.
Position AMP- = the signal present on JP25, buffered through U7.
Position not in AMP- = optional multiplexer output, DA, is used.
Selection of the IN− analog signal of U1.
Position Unip = single-ended ADC: AD7683, AD7685, AD7694, AD7942, AD7946, AD7980.
Position Diff = true differential ADC: AD7684, AD7687, AD7688, AD7690, AD7691, AD7693,
AD7982.
Selection of the reference voltage.
Position ADR43X = on board 5V reference voltage is used.
Position VDD = the ADC reference is coming from the VDD supply.
Selection of the reference voltage.
Positon NO BUF = refence present on JP4 (ADR43X or VDD) is selected
Position BUF = buffered reference present on JP4 (ADR43X or VDD) is selected. This buffer
(AD8032) can help to filter the VDD when used as the reference voltage.
Selection for negative supply, VDRV.
Selection for positive supply, VDRV+.
Selection for reference circuit supply, VREF.
Selection for digital output interface voltage, VIO.
Selection for ADC, U1 and U8 supply VDD.
Selection for FPGA output interface voltage VIO. Must be set at VIO or 3.3V which ever is the
lowest.
Selection of JP1 source
BUF+ = U6 amplifier output.
SMB+ = direct input from J1, AIN+ (SMB plug).
DIF+ = optional differential amplifer + output.
Selection of JP2 source
BUF- = U7 amplifier output.
SMB- = direct input from J2, AIN-(SMB plug).
DIF- = optional differential amplifer - output.
Rev. Pr G | Page 5 of 18
Available Signal
Ground
Ground
ADC Analog input IN+
Ground
ADC Reference input
ADC (U1) SDI signal
ADC CNV signal
ADC SCK signal
ADC (U1) SDO signal
ADC (U8) SDO signal
Parallel ADC data valid
Ground
ADC Analog input
EVAL-AD76XXCB 8/10-Pin