EVAL-AD7675CBZ Analog Devices Inc, EVAL-AD7675CBZ Datasheet - Page 17

• Manufacturer Part Number: EVAL-AD7675CBZ
• Description: BOARD EVALUATION FOR AD7675
• Manufacturer: Analog Devices Inc
• Series: PulSAR®r

Specifications of EVAL-AD7675CBZ

• Number Of Adc's: 1
• Number Of Bits: 16
• Sampling Rate (per Second): 100k
• Data Interface: Serial, Parallel
• Inputs Per Adc: 1 Differential
• Input Range: ±VREF
• Power (typ) @ Conditions: 17mW @ 100kSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD7675
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. A
External Clock Data Read During Conversion
Figure 20 shows the detailed timing diagrams of this method.
During a conversion, while both CS and RD are low, the result
of the previous conversion can be read. The data is shifted out,
MSB first, with 16 clock pulses, and is valid on both rising and
falling edges of the clock. The 16 bits have to be read before the
current conversion is complete. If that is not done, RDERROR is
pulsed high and can be used to interrupt the host interface to
prevent incomplete data reading. There is no “daisy chain”
feature in this mode, and RDC/SDIN input should always be
tied either high or low.
To reduce performance degradation due to digital activity, a fast
discontinuous clock of 18 MHz at least is recommended to ensure
that all the bits are read during the first half of the conversion
phase. For this reason, this mode is more difficult to use.
MICROPROCESSOR INTERFACING
The AD7675 is ideally suited for traditional dc measurement
applications supporting a microprocessor, and ac signal process-
ing applications interfacing to a digital signal processor. The
AD7675 is designed to interface either with a parallel 8-bit or
Figure 20. Slave Serial Data Timing for Reading (Read Previous Conversion during Convert)
SDOUT
CNVST
BUSY
SCLK
CS
t
CNVST IN
16
SCLK IN
Figure 21. Two AD7675s in a “Daisy Chain” Configuration
t
CS IN
3
RDC/SDIN
t
31
X
AD7675
(UPSTREAM)
t
36
1
t
BUSY
35
D15
t
37
#2
SDOUT
CNVST
2
SCLK
CS
D14
EXT/INT = 1
t
32
3
D13
–17–
16-bit wide interface or with a general purpose serial port or I/O
ports on a microcontroller. A variety of external buffers can be
used with the AD7675 to prevent digital noise from coupling
into the ADC. The following sections illustrate the use of the
AD7675 with an SPI-equipped microcontroller, and the
ADSP-21065L and ADSP-218x signal processors.
SPI Interface (MC68HC11)
Figure 22 shows an interface diagram between the AD7675 and
an SPI-equipped microcontroller like the MC68HC11. To
accommodate the slower speed of the microcontroller, the
AD7675 acts as a slave device and data must be read after con-
version. This mode also allows the “daisy chain” feature. The
convert command could be initiated in response to an internal
timer interrupt. The reading of output data, one byte at a time if
necessary, could be initiated in response to the end-of-conversion
signal (BUSY going low) using an interrupt line of the micro-
controller. The Serial Peripheral Interface (SPI) on the MC68HC11
is configured for master mode (MSTR) = 1, Clock Polarity Bit
(CPOL) = 0, Clock Phase Bit (CPHA) = 1 and SPI interrupt
enable (SPIE) = 1 by writing to the SPI Control Register (SPCR).
The IRQ is configured for edge-sensitive-only operation
(IRQE = 1 in OPTION register).
RDC/SDIN
(DOWNSTREAM)
AD7675
INVSCLK = 0
14
BUSY
#1
SDOUT
CNVST
SCLK
15
CS
D1
BUSY
OUT
16
DATA
OUT
RD = 0
D0
AD7675