CDB5340 Cirrus Logic Inc, CDB5340 Datasheet - Page 15

• Manufacturer Part Number: CDB5340
• Description: BOARD EVAL FOR CS5340 STEREO ADC
• Manufacturer: Cirrus Logic Inc

Specifications of CDB5340

• Number Of Adc's: 1
• Number Of Bits: 24
• Sampling Rate (per Second): 192k
• Data Interface: Serial
• Inputs Per Adc: 2 Single
• Power (typ) @ Conditions: 180mW @ 5 V
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -10°C ~ 70°C
• Utilized Ic / Part: CS5340
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1544

DS601F2
4. APPLICATIONS
4.1
4.2
* Quad-Speed Mode, 64x only available in Master Mode.
Single-, Double-, and Quad-Speed Modes
The CS5340 can support output sample rates from 2 kHz to 200 kHz. The proper speed mode can be de-
termined by the desired output sample rate and the external MCLK/LRCK ratio, as shown in
Operation as Either a Clock Master or Slave
The CS5340 supports operation as either a clock master or slave. As a clock master, the LRCK and SCLK
pins are outputs with the left/right and serial clocks synchronously generated on-chip. As a clock slave, the
LRCK and SCLK pins are inputs and require the left/right and serial clocks to be externally generated. The
selection of clock master or slave is made via the Mode pins as shown in
Double-Speed Mode
Single-Speed Mode
Quad-Speed Mode
Speed Mode
Table 1. Speed Modes and the Associated Output Sample Rates (Fs)
M1 (Pin 16)
0
0
1
1
M0 (Pin 1)
Table 2. CS5340 Mode Control
0
1
0
1
MCLK/LRCK
Confidential Draft
Ratio
512x
256x
256x
128x
128x
64x*
Clock Master, Single-Speed Mode
Clock Master, Double-Speed Mode
Clock Master, Quad-Speed Mode
Clock Slave, All Speed Modes
3/11/08
MODE
Output Sample Rate Range (kHz)
Table
172 - 200
100 - 200
86 - 100
43 - 50
4 - 100
2 - 50
2.
Table
CS5340
1.
15