HI5714EVAL Intersil, HI5714EVAL Datasheet - Page 10

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HI5714EVAL

Manufacturer Part Number
HI5714EVAL
Description
EVALUATION PLATFORM HI5714
Manufacturer
Intersil
Datasheets

Specifications of HI5714EVAL

Number Of Adc's
1
Number Of Bits
8
Sampling Rate (per Second)
75M
Data Interface
Parallel
Inputs Per Adc
1 Single Ended
Input Range
2.7 Vpp
Power (typ) @ Conditions
325mW @ 75MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
0°C ~ 70°C
Utilized Ic / Part
HI5714
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Applications
Figures 9 and 10 show two possible circuit configurations,
AC coupled with a DC restore circuit and DC coupled with a
DC offset amplifier.
+5VA
+5VA
V
IN
SAMPLE
V
IN
PULSE
OFFSET
+
-
+
-
10
+5VA
3.6V
3.6V
FIGURE 9. TYPICAL AC COUPLED INPUT WITH DC RESTORE
+
-
+
-
CLOCK
1.3V
CLOCK
DC RESTORE
1.3V
FIGURE 10. TYPICAL DC COUPLED INPUT
0.1
0.1
+
+5VA
-
+5VA
0.1
0.1
10
HI5714
10
0.1
0.1
16
22
16
22
9
4
8
7
5
6
9
4
8
7
5
6
Due to the high clock rate, FCT (TTL/CMOS) or FAST (TTL)
glue logic should be used. FCT logic will tend to have large
overshoots if not loaded. Long traces (>2 or 3 inches) should
be terminated to maintain signal integrity.
CLK
V
V
OE
V
V
NC
AGND
CLK
V
V
OE
V
V
NC
AGND
RT
RB
IN
CCA
RT
RB
IN
CCA
HI5714
HI5714
OGND
DGND
V
V
V
OGND
DGND
O/UF
V
V
V
CCO
CCO
CCD
O/UF
CCO
CCO
CCD
NC
NC
D0
D1
D2
D3
D4
D5
D6
D7
NC
NC
D0
D1
D2
D3
D4
D5
D6
D7
2
1
24
23
15
14
13
12
11
19
21
18
20
3
17
10
2
1
24
23
15
14
13
12
11
19
21
18
20
3
17
10
10
10
0.1
0.1
+5VD
+5VD

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