MAX1282EVC16 Maxim Integrated Products, MAX1282EVC16 Datasheet - Page 10

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MAX1282EVC16

Manufacturer Part Number
MAX1282EVC16
Description
EVAL KIT FOR MAX1282
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of MAX1282EVC16

Number Of Adc's
1
Number Of Bits
12
Sampling Rate (per Second)
400k
Data Interface
Serial
Inputs Per Adc
4 Single Ended
Input Range
±VREF/2
Power (typ) @ Conditions
13.75mW @ 400kSPS
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Utilized Ic / Part
MAX1282
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
300ksps/400ksps, Single-Supply, 4-Channel,
Serial 12-Bit ADCs with Internal Reference
Figure 1. Load Circuits for Enable Time
10
PIN
2–5
10
11
12
13
14
15
16
DOUT
1
6
7
8
9
______________________________________________________________________________________
a) High-Z to V
3k
CH0–CH3
REFADJ
SSTRB
NAME
SHDN
DOUT
SCLK
V
COM
V
GND
REF
DIN
CS
DD1
DD2
OH
GND
and V
OL
to V
Positive Supply Voltage
Sampling Analog Inputs
Ground Reference for Analog Inputs. COM sets zero-code voltage in single-ended mode. Must be
stable to ±0.5LSB.
Active-Low Shutdown Input. Pulling SHDN low shuts down the device, reducing supply current to 2µA (typ).
Reference-Buffer Output/ADC Reference Input. Reference voltage for analog-to-digital conversion. In
internal reference mode, the reference buffer provides a 2.500V nominal output, externally adjustable at
REFADJ. In external reference mode, disable the internal buffer by pulling REFADJ to V
Input to the Reference-Buffer Amplifier. To disable the reference-buffer amplifier, connect REFADJ to V
Ground
Serial-Data Output. Data is clocked out at SCLK’s rising edge. High impedance when CS is high.
Serial Strobe Output. SSTRB pulses high for one clock period before the MSB decision. High impedance
when CS is high.
Serial-Data Input. Data is clocked in at SCLK’s rising edge.
Active-Low Chip Select. Data will not be clocked into DIN unless CS is low. When CS is high, DOUT and
SSTRB are high impedance.
Serial-Clock Input. Clocks data in and out of serial interface and sets the conversion speed. (Duty cycle
must be 40% to 60%.)
Positive Supply Voltage
OH
C
50pF
LOAD
b) High-Z to V
DOUT
V
DD2
OL
and V
3k
C
GND
50pF
LOAD
OH
to V
OL
Figure 2. Load Circuits for Disable Time
FUNCTION
DOUT
3k
a) V
GND
OH
to High-Z
C
70pF
LOAD
Pin Description
DOUT
b) V
DD1
OL
V
DD2
to High-Z
.
3k
C
GND
20pF
LOAD
DD1
.

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