SI3460-EVB Silicon Laboratories Inc, SI3460-EVB Datasheet - Page 15

• Manufacturer Part Number: SI3460-EVB
• Description: BOARD EVAL POE FOR SI3460
• Manufacturer: Silicon Laboratories Inc
• Type: DC/DC Switching Converters, Regulators & Controllersr

Specifications of SI3460-EVB

• Main Purpose: Special Purpose DC/DC, Power Over Ethernet
• Outputs And Type: 1, Non-Isolated
• Voltage - Output: -48V
• Board Type: Fully Populated
• Utilized Ic / Part: Si3460
• Input Voltage: 12 V, 15 V
• Output Voltage: - 48 V
• Interface Type: Ethernet
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Product: Power Management Modules
• For Use With/related Products: Si3460
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Voltage - Input: -
• Power - Output: -
• Frequency - Switching: -
• Regulator Topology: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1842

6. Si3460 Pin Descriptions
Si3460 pin functionality is described in Table 10. Note that the information applies to the Si3460 device pins, while
the Si3460-EVB User’s Guide describes the inputs and outputs of the evaluation system.
The electrical characteristics of the Si3460-EVB are summarized in Table 1 on page 5. Refer to the complete
Si3460-EVB schematics and BOM listing for information about the external components needed for the complete
PSE and dc-dc controller application circuit.
Pin #
1
2
3
4
5
6
7
Pin Name
VSENSE
250KHZ
CTRL1
CTRL2
GATE
DETA
VDD
Digital output
Digital output
Digital output
Digital output
Analog input
Analog input
Pin Type
Power
250KHZ
CTRL1
CTRL2
GATE
VDD
Table 10. Si3460 Pin Functionality
1
2
3
4
5
3.3 V power supply input.
A logic low on this pin turns on the output FET to enable the PSE
output voltage. Refer to the Si3460-EVB schematics for the circuit
connections between the external FET and this pin.
The output of this pin is averaged with CTRL2 to control PWM duty
cycle for the dc-dc controller. This output also controls the dc output
for the detection circuitry.
The output of this pin is averaged with CTRL1 to control PWM duty
cycle for the dc-dc controller. This output also controls the dc output
for the detection circuitry.
This is a 250 kHz square wave (50% duty cycle) that is filtered into
a triangular wave signal for the dc-dc controller. The 250 kHz output
on this pin is gated off when it is desired to keep the switcher FET
off.
DETA is an analog input pin. During the detection process, the
CTRL1 and CTRL2 pin duty cycle is varied to generate filtered dc
voltages across a resistive bridge. The null indicator for this bridge
is connected to pin DETA.
VSENSE is an analog input used for sensing the PSE output volt-
age.
Rev. 1.1
GND
10
9
8
7
6
Pin Function
STATUS
ISENSE
RST
VSENSE
DETA
Si3460
15