ISL6548A-6506EVAL1Z Intersil, ISL6548A-6506EVAL1Z Datasheet

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ISL6548A-6506EVAL1Z

Manufacturer Part Number
ISL6548A-6506EVAL1Z
Description
EVALUATION BOARD ISL6548A-6506
Manufacturer
Intersil

Specifications of ISL6548A-6506EVAL1Z

Main Purpose
Special Purpose DC/DC, DDR Memory Supply
Outputs And Type
7, Non-Isolated
Power - Output
178W
Voltage - Output
1.8V, 3.3V, 5V, 1.5V, 1.2V, 2.5V, 0.9V
Current - Output
15A, 14A, 14A, 10A, 5A, 5A, 2A
Voltage - Input
3.3V, 5V, 12V
Regulator Topology
Buck
Board Type
Fully Populated
Utilized Ic / Part
ISL6506, ISL6548A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Frequency - Switching
-
Introduction
The ISL6548A, in conjunction with the ISL6506, provides a
complete ACPI compliant power solution for computer
systems with either dual channel DDRI, DDRII, or DDRIII
Memory systems. The chipset offered by Intersil provides the
necessary control, protection and proper ACPI sequencing of
the following rails: 5VDUAL, 3.3VDUAL, V
V
The ISL6548A consists of a synchronous buck controller to
supply V
states and standby current during S3 (Suspend-To-RAM =
STR) state. During Run mode, a fully integrated sink-source
regulator generates an accurate (V
V
controller that, in conjunction with an external gate driver IC,
regulates V
regulate V
V
A more complete description of the ISL6548A can be found
in the datasheet[1].
The ISL6506 controls the 5VDUAL and 3.3VDUAL rails.
There are three versions of the ISL6506. The version
required will depend on whether 5V Dual is required to be
active during S4/S5. A more complete description of the
ISL6506 can be found in the datasheet[2].
Quick Start Evaluation
The ISL6548A_6506EVAL1Z board is shipped ‘ready to use’
right from the box. The ISL6548A_6506EVAL1Z supports
testing with an ATX power supply. All seven outputs can be
exercised through external loads. Both the V
regulators have the ability to source or sink current while all
other outputs may only source current.
There are posts available on each regulated output rail for
drawing a load and/or monitoring the voltages. Eighteen
individually labeled probe points are also available for use.
These probe points provide Kelvin connections to signals
which may be of interest to the designer.
Two switches have been placed on the board to
accommodate ACPI signal simulation. These two switches
generate the SLP_S3 and SLP_S5 signals that are sent to
the ISL6506, ISL6548A and the ATX.
Recommended Test Equipment
To test the full functionality of the ISL6548A and ISL6506,
the following equipment is recommended:
• An ATX power supply (minimum 160W configuration)
• Multiple electronic loads
• Four channel oscilloscope with probes
• Precision digital multimeters
TT_DDR
TT_DDR
TT_GMCH/CPU
DDQ_DDR
, V
voltage. The ISL6548A also features a PWM
DAC
GMCH
DAC
and V
, V
is capable of sourcing and sinking current.
. Two LDO controllers are available to
GMCH
with high current during S0/S1 (Run)
TT_GMCH/CPU
, and V
®
1
TT_GMCH/CPU
DDQ_DDR
. The LDO for
Application Note
DDQ_DDR
Generation Using the ISL6548A and ISL6506
/2) high current
DDQ
.
and V
,
Embedded ACPI Compliant DDR Power
1-888-INTERSIL or 1-888-468-3774
TT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
As there are seven regulated rails, it is difficult to exercise
and monitor all of them at the same time. The user may wish
to employ discrete resistive loads in addition to electronic
loads. Electronic loads are favored because they allow the
user to apply a multitude of varying load levels and load
transients which allow for a broader analysis.
Circuit Setup
SET SWITCHES
Ensure that the S3 switch is in the ACTIVE position and the
S5 switch is in the S5 position. With the switches in these
positions, the board will be forced into a sleep state at initial
power up.
CONNECT THE ATX SUPPLY
Plug the 20-pin connector from the ATX power supply into
the 20-pin receptacle, J1, on the evaluation board. Should
the ATX power supply have a master AC switch, turn this
switch to the OFF position prior to applying AC voltage.
CONNECT LOADS
Figure 1 details the locations of the available power, ground,
and signal connection points on the ISL6548A_6506EVAL1Z
evaluation board. The maximum loads specified for each rail
below are absolute. V
V
the V
Schematic” on page 11). Any loading of a cascaded rail will
itself be a load on the rail that is providing input and must be
accounted for prior to application of loads.
DDQ_DDR
FIGURE 1. ISL6548A_6506EVAL1Z BOARD POWER AND
KEY
January 15, 2007
GMCH
(VDAC)
(VGMCH)
(VTT_GMCH/CPU)
All other trademarks mentioned are the property of their respective owners.
ATX
CONNECTOR
|
- Ground Terminal for Load and/or Probe Ground Clip
- Output Rail Terminal for Load and/or Probe
- Probe Point
rail (refer to “ISL6548A_6506EVAL1Z
Intersil (and design) is a registered trademark of Intersil Americas Inc.
rail while the V
ISL6548A_6506EVAL1Z
ISL6506
SIGNAL CONNECTIONS
(SWITCHES)
Copyright Intersil Americas Inc. 2007. All Rights Reserved
TT_DDR
TT_GMCH/CPU
(5VDUAL)
(3VDUAL)
S3
is cascaded from the
SLP_S3#
Author: Douglas Mattingly
VCC3
SLP_S5# PWR_OK
S5
12V
5VSBY
VCC5
ISL6548A
3VDUAL
5VDUAL UGATE
VID_PG
is cascaded from
VREF_IN
AN1285.0
LGATE
(DDR_VTT)
(VDDQ)

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ISL6548A-6506EVAL1Z Summary of contents

Page 1

... DAC TT_GMCH/CPU V is capable of sourcing and sinking current. TT_GMCH/CPU A more complete description of the ISL6548A can be found in the datasheet[1]. The ISL6506 controls the 5VDUAL and 3.3VDUAL rails. There are three versions of the ISL6506. The version required will depend on whether 5V Dual is required to be active during S4/S5 ...

Page 2

... Reference Design General The ISL6548A_6506EVAL1Z is an evaluation board that highlights the operation of the ISL6548A and ISL6506 in an embedded ACPI and DDR DRAM Memory Power application. The V supply 1. maximum load of 15A. The V termination supply will track the V while sourcing or sinking current ...

Page 3

... Active to Shutdown ( transition). Table 1 shows the switch positions and the corresponding ACPI states. TABLE 1. ISL6548A_6506EVAL1Z STATES S3 SWITCH S5 SWITCH SLEEP STATE ACTIVE ACTIVE S0 (Active) S3 ACTIVE S3 ACTIVE both the S3 and S5 switches are thrown to S3 and S5, respectively, the board will default state. If the board is in either sleep state, the ATX supply is put into standby mode, where only the 5VSBY rail is active ...

Page 4

... HIGH, the PCIRST# signal from the ICH asserts HIGH. When PCIRST# asserts HIGH, bus traffic resumes and the system is awake. The ISL6506 and ISL6548A chipset bring all the ACPI rails under their control into regulation between time T3 and T4. V This timing assures, even with minimum specified system ...

Page 5

... GMCH up until the V entering a sleep state, the V the V GMCH ramp down. A circuit was included on the ISL6548A evaluation board that will keep a 0.7V differential between the V V rails until the V DAC also discharge the V a sleep state. This circuit is shown in Figure 7. During start- FIGURE 7 ...

Page 6

... Evaluation Board Performance This section presents the performance of the ISL6548A_6506EVAL1Z evaluation board while subjected to various conditions. Switching Regulator Ripple Voltages Figure 8 shows the ripple voltage on the V outputs. V DDQ_DDR 20mV/DIV AC COUPLED V GMCH 50mV/DIV AC COUPLED V UGATE(GMCH) 10V/DIV TIMEBASE: 1µs/DIV FIGURE 8. V and V RIPPLE VOLTAGE ...

Page 7

FET. Figure 12 shows V under transient loading. GMCH V (1.8V OFFSET) DDQ_DDR V (0.9V ...

Page 8

VIDPG 5V/DIV TIMEBASE: 50ms/DIV NOTE: ALL SIGNALS AT 500mV/DIV UNLESS OTHERWISE STATED 100Ω LOAD ON ALL RAILS FIGURE 16. FAULT RESPONSE ON VDDQ V DAC V DDQ_DDR GMCH V VIDPG 5V/DIV TIMEBASE: 50ms/DIV NOTE: ...

Page 9

... ATX supply on even in sleep states. Conclusion The ISL6548A_6506EVAL1Z is a versatile platform that allows designers to gain a full understanding of the functionality of the ISL6506 and ISL6548A chipset in an regulator, ACPI compliant system. The board is also flexible enough to allow the designer to modify the board for differing requirements ...

Page 10

... References For Intersil documents available on the web, see http://www.intersil.com/ [1] ISL6548A Data Sheet, Intersil Corporation, FN9189. [2] ISL6506 Data Sheet, Intersil Corporation, FN9141. [3] Designing Stable Compensation Networks for Single Phase Voltage Mode Buck Regulators, Intersil Corporation, TB417. [4] Advanced Configuration and Power Interface Specification, Revision 3 ...

Page 11

... ISL6548A_6506EVAL1Z Schematic J1 3 PSON S3# Rx11 13 S5# GND 5VSBY C500 ISL6506 1 VCC 2 3V3AUX 3 S3# S3# 4 S5# S5# 9 R100 VID_PG 12VATX 3V3ATX ISL6613 + U3 C300 BT C303 VGMCH UG PWM L201 PS + GND C302 C303 LG Q300 R305 C309 R306 C306 VGMCH C310 R304 R303 Q400 R400 VTT_GMCH/CPU + C401 ...

Page 12

... ISL6548A_6506EVAL1Z Bill of Material REF DES DESCRIPTION C100, 101, 201, 1µF, X5R Capacitor 202, 307, 308 C204-206 2200µF 6.3V MBZ Capacitor C207, 208, 209, 1800µF 16V MBZ Capacitor 301, 304, 400, 605, 607 C106, 300, 305, 220µF, 25V 601, 602, 603 C105, 210-213, 22µ ...

Page 13

... ISL6548A_6506EVAL1 Layout 13 Application Note 1285 FIGURE 22. TOP SILK SCREEN FIGURE 23. TOP AN1285.0 January 15, 2007 ...

Page 14

... ISL6548A_6506EVAL1 Layout 14 Application Note 1285 (Continued) FIGURE 24. INTERNAL 1 GROUND FIGURE 25. INTERNAL 2 POWER AN1285.0 January 15, 2007 ...

Page 15

... ISL6548A_6506EVAL1 Layout Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com ...

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