MAX17000EVKIT+ Maxim Integrated Products, MAX17000EVKIT+ Datasheet - Page 20

• Manufacturer Part Number: MAX17000EVKIT+
• Description: KIT EVAL FOR MAX17000
• Manufacturer: Maxim Integrated Products

Specifications of MAX17000EVKIT+

• Main Purpose: Special Purpose DC/DC, DDR Memory Supply
• Outputs And Type: 3, Non-Isolated
• Power - Output: 19.8W
• Voltage - Output: 1.8V, 0.9V, 0.9V
• Current - Output: 10A, 2A, 3mA
• Voltage - Input: 7 ~ 20V
• Regulator Topology: Buck
• Frequency - Switching: 300kHz
• Board Type: Fully Populated
• Utilized Ic / Part: MAX17000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Complete DDR2 and DDR3 Memory
Power-Management Solution
The MAX17000 uses the same valley current-limit pro-
tection employed on all Maxim Quick-PWM controllers. If
the current exceeds the valley current-limit threshold,
the PWM controller is not allowed to initiate a new cycle.
The actual peak current is greater than the valley cur-
rent-limit threshold by an amount equal to the inductor
ripple current. Therefore, the exact current-limit charac-
teristic and maximum load capability are a function of
the inductor value and battery voltage. When combined
with the undervoltage-protection circuit, this current-limit
method is effective in almost every circumstance.
In forced-PWM mode, the MAX17000 also implements
a negative current limit to prevent excessive reverse
inductor currents when V
negative current-limit threshold is set to approximately
115% of the positive current limit. See Figure 5.
Figure 5. Valley Current-Limit Threshold Point
The MAX17000 features two power-good outputs.
PGOOD1 is the open-drain output for a window com-
parator that continuously monitors the SMPS output.
PGOOD1 is actively held low in shutdown and during
soft-start and soft-shutdown. After the soft-start termi-
nates, PGOOD1 becomes high impedance as long as
the SMPS output voltage is between 115% (typ) and
85% (typ) of the regulation voltage. When the SMPS
output voltage exceeds the 115%/85% regulation win-
dow, the MAX17000 pulls PGOOD1 low. Any fault con-
dition on the SMPS output forces PGOOD1 and
PGOOD2 low and latches off until the fault latch is
cleared by toggling SHDN or cycling V
1V. Detection of an OVP event immediately pulls
PGOOD1 low, regardless of the OVP state (OVP
enabled or disabled).
20
______________________________________________________________________________________
0
Valley Current-Limit Protection
I
LIM(VAL)
= I
(PGOOD1 and PGOOD2)
LOAD(MAX)
OUT
TIME
Power-Good Outputs
is sinking current. The
( )
1-
LIR
2
CC
I
I
I
power below
PEAK
LOAD
LIMIT
PGOOD2 is the open-drain output for a window com-
parator that continuously monitors the VTT output.
PGOOD2 is actively held low in standby, shutdown,
and during soft-start. PGOOD2 becomes high imped-
ance as long as the VTT output voltage is within ±10%
of the regulation voltage. When the VTT output exceeds
the ±10% threshold, the MAX17000 pulls PGOOD2 low.
If PGOOD2 remains low for 5ms (typ), the MAX17000
latches off with the soft-shutdown sequence.
For logic-level output voltages, connect an external 100kΩ
pullup resistor from PGOOD1 and PGOOD2 to V
Power-on reset (POR) occurs when V
approximately 2V, resetting the fault latch and soft-start
circuit and preparing the controller for power-up. When
OVP is enabled, a rising edge on POR turns on the 16Ω
discharge MOSFET on CSL and VTT. When OVP is dis-
abled, the internal 16Ω discharge MOSFETs on CSL
and VTT also remain off.
V
switching until V
above 4.1V, the controller activates the PWM controller
and initializes soft-start. When V
UVLO threshold (falling edge), the controller stops, DL
is pulled low, and the internal 16Ω discharge
MOSFETs on the CSL and VTT outputs are enabled, if
OVP is enabled.
Soft-start and soft-shutdown for the MAX17000 PWM
block is voltage based. Soft-start begins when SHDN is
driven high. During soft-start, the PWM output is
ramped up from 0V to the final set voltage in 1.4ms.
This reduces inrush current and provides a predictable
ramp-up time for power sequencing. The MAX17000
always uses skip mode during startup, regardless of
the SKIP and STDBY setting. The SKIP and STDBY con-
trols take effect after soft-start is done.
The MAX17000 VTT LDO regulator uses a current-limited
soft-start function. When the VTT block is enabled, the
internal source and sink current limits are linearly
increased from zero to the full-scale limit in 160µs. Full-
scale current limit is available when the VTT output is in
regulation, or after 160µs, whichever is earlier. The VTTR
reference buffer does not have any soft-start control.
CC
undervoltage lockout (UVLO) circuitry inhibits
CC
Soft-Start and Soft-Shutdown
reaches 4.1V (typ). When V
CC
drops below the
CC
POR, UVLO
rises above
CC
DD
.
rises