MCP4725EV Microchip Technology, MCP4725EV Datasheet - Page 29

BOARD EVAL FOR MCP4725

MCP4725EV

Manufacturer Part Number
MCP4725EV
Description
BOARD EVAL FOR MCP4725
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP4725EV

Number Of Dac's
1
Number Of Bits
12
Outputs And Type
1, Single Ended
Sampling Rate (per Second)
100k ~ 3.4M
Data Interface
I²C
Settling Time
6µs
Dac Type
Voltage
Voltage Supply Source
Single
Operating Temperature
-40°C ~ 125°C
Utilized Ic / Part
MCP4725
Processor To Be Evaluated
MCP4725
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7.5.5
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this acknowledge bit.
The device that acknowledges, has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH
period of the acknowledge related clock pulse. Of
FIGURE 7-3:
© 2009 Microchip Technology Inc.
SDA
SCL
(A)
ACKNOWLEDGE
CONDITION
START
(B)
Data Transfer Sequence On The Serial Bus.
ACKNOWLEDGE
ADDRESS OR
VALID
(D)
TO CHANGE
ALLOWED
DATA
course, setup and hold times must be taken into
account. During reads, a master must send an end of
data to the slave by not generating an acknowledge bit
on the last byte that has been clocked out of the slave.
In this case, the slave (MCP4725) will leave the data
line HIGH to enable the master to generate the STOP
condition.
(D)
MCP4725
DS22039D-page 29
CONDITION
STOP
(C)
(A)

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