ISL5829EVAL1 Intersil, ISL5829EVAL1 Datasheet
ISL5829EVAL1
Manufacturer Part Number
ISL5829EVAL1
Description
EVALUATION PLATFORM ISL5829 HS
Manufacturer
Intersil
Series
CommLink™r
Specifications of ISL5829EVAL1
Number Of Dac's
2
Number Of Bits
12
Outputs And Type
2, Differential
Sampling Rate (per Second)
210M
Data Interface
Parallel
Dac Type
Current
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ISL5829
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Description
The ISL5x29EVAL1 evaluation board provides a quick and
easy method for evaluating the ISL5629, 5729, 5829, 5929
(8-,10-, 12-, or 14-bit), 130/210MSPS high-speed dual
DACs. The board is configured to route the DAC differential
output currents into a transformer balanced load to form an
output voltage. The amount of current out of the DAC is
determined by an external resistor and either an internal or
external reference voltage. The CMOS digital inputs have
optional external termination resistors. The evaluation board
includes a ribbon cable digital interface that is compatible
with Intersil DUC (Digital Up Converter) evaluation boards
like the ISL5217EVAL1.
Features
• 210MSPS 8-, 10-, 12-, or 14-bit CMOS Dual DAC
• Transformer-Coupled or Single-Ended SMA Outputs
• Compatibility to the ISL5217 DUC evaluation board allows
Ordering Information
Functional Block Diagram
ISL5629EVAL1
ISL5729EVAL1
ISL5829EVAL1
ISL5929EVAL1
complete baseband-to-IF demonstration
NUMBER
PART
CLKOUT
SMA
8-14 BITS
8-14 BITS
CLOCK
CLKIN
SMA
RANGE
TEMP.
(
o
25
25
25
25
DUAL
TM
DAC
C)
1
NUMBER OF
QOUTB
QOUTA
IOUTB
IOUTA
SMA
SMA
SMA
SMA
Application Note
BITS
2x10
2x12
2x14
2x8
XFMR
XFMR
DGND PLANE
AGND PLANE
DVDD PLANE
AVDD PLANE
210MHz
210MHz
210MHz
210MHz
CLOCK
SPEED
QOUT
SMA
IOUT
SMA
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Getting Started
See Figure 1. A summary of the external supplies,
equipment, and signal sources needed to operate the board
is given below:
Connect the evaluation board to the power supply(s).
Connect the data output from the pattern generator to the
evaluation board 2 x 20-pin connectors J1 and/or J3.
Connect the clock source to the evaluation board, either
through pin 19 of connectors J1 or J3 or via the provided
SMA (J2).
Using a coaxial cable with the proper SMA connector, attach
the output of one side of the dual converter, I
Q
evaluating the converter’s performance. Make sure that the
evaluation board jumpers are in their proper placement (see
jumper info).
Turn the power supply on. Turn the pattern and clock on and
measure the DAC performance at the analog output SMA
(J9 or J12).
1. +3.3V supply for ISL5x29 DAC.
2. 3V LVCMOS compatible pattern source.
3. Low jitter clock source (< 10ps preferable).
4. Spectrum Analyzer or Oscilloscope for viewing the output
OUT
ISL5x29EVAL1 User’s Manual
of the converter.
(J9), to the measurement equipment that will be
February 2002
|
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
Intersil (and design) is a trademark of Intersil Americas Inc.
OUT
AN9997
(J11) or
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ISL5829EVAL1 Summary of contents
Page 1
... Compatibility to the ISL5217 DUC evaluation board allows complete baseband-to-IF demonstration Ordering Information TEMP. PART RANGE NUMBER OF o NUMBER ( C) BITS ISL5629EVAL1 25 2x8 ISL5729EVAL1 25 2x10 ISL5829EVAL1 25 2x12 ISL5929EVAL1 25 2x14 Functional Block Diagram QOUTA SMA 8-14 BITS QOUTB SMA DUAL DAC IOUTB 8-14 BITS SMA CLOCK ...
Page 2
... GORE QUIETZONE PATTERN GENERATOR OPTIONAL DIRECT CLK CABLE FIGURE 1. INTERSIL ISL5x29 EVALUATION SYSTEM SETUP BLOCK DIAGRAM Board Options Jumpers (Default State) J19 - Selects DAC Sleep Mode (OPEN) J21 -Selects External Reference (OPEN) J20 - Selects Internal Reference (SHORT) J17 Selects IOUTA, QOUTA (SHORT) ...
Page 3
... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...