HI5728EVAL1 Intersil, HI5728EVAL1 Datasheet

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HI5728EVAL1

Manufacturer Part Number
HI5728EVAL1
Description
EVALUATION PLATFORM TQFPHI5728
Manufacturer
Intersil
Datasheets

Specifications of HI5728EVAL1

Number Of Dac's
2
Number Of Bits
10
Outputs And Type
2, Differential
Sampling Rate (per Second)
125M
Data Interface
Parallel
Settling Time
35ns
Dac Type
Current
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
HI5728
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
10-Bit, 125/60MSPS, Dual High Speed
CMOS D/A Converter
The HI5728 is a 10-bit, dual 125MSPS D/A converter which
is implemented in an advanced CMOS process. It is
designed for high speed applications where integration,
bandwidth and accuracy are essential. Operating from a
single +5V or +3V supply, the converter provides 20.48mA of
full scale output current and includes an input data register.
Low glitch energy and excellent frequency domain
performance are achieved using a segmented architecture.
A 60MSPS version and an 8-bit (HI5628) version are also
available. Comparable single DAC solutions are the HI5760
(10-bit) and the HI5660 (8-bit).
Ordering Information
HI5728IN*
HI5728INZ*
(Note)
HI5728/6IN
HI5728/6INZ
(Note)
HI5728EVAL1
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel
specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special
Pb-free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified at Pb-free peak
reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
NUMBER
PART
HI5728IN
HI5728INZ
HI5728/6IN
HI5728 /6INZ -40 to +85 48 Ld LQFP
MARKING
PART
-40 to +85 48 Ld LQFP Q48.7x7A
-40 to +85 48 Ld LQFP
-40 to +85 48 Ld LQFP Q48.7x7A
®
RANGE
TEMP.
(°C)
+25
1
Evaluation Platform
(Pb-free)
(Pb-free)
Data Sheet
PACKAGE
Q48.7x7A
Q48.7x7A
DWG. #
PKG.
1-888-INTERSIL or 1-888-468-3774
CLOCK
SPEED
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
(MHz)
MAX
125
125
125
60
60
Features
• Throughput Rate . . . . . . . . . . . . . . . . . . . . . . . . 125MSPS
• Low Power . . . . . . . . . . . . . . . 330mW at 5V, 54mW at 3V
• Integral Linearity Error . . . . . . . . . . . . . . . . . . . . . ±1 LSB
• Differential Linearity . . . . . . . . . . . . . . . . . . . . . . ±0.5 LSB
• Gain Matching (Typ). . . . . . . . . . . . . . . . . . . . . . . . . . 0.5%
• SFDR at 5MHz Output . . . . . . . . . . . . . . . . . . . . . . . 68dBc
• Single Power Supply from +5V to +3V
• CMOS Compatible Inputs
• Excellent Spurious Free Dynamic Range
• Internal Voltage Reference
• Dual 10-Bit D/A Converters on a Monolithic Chip
• Pb-Free Available (RoHS Compliant)
Applications
• Wireless Local Loop
• Direct Digital Frequency Synthesis
• Wireless Communications
• Signal Reconstruction
• Arbitrary Waveform Generators
• Test Equipment/Instrumentation
• High Resolution Imaging Systems
January 22, 2010
All other trademarks mentioned are the property of their respective owners.
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 1999, 2010. All Rights Reserved
HI5728
FN4321.5

Related parts for HI5728EVAL1

HI5728EVAL1 Summary of contents

Page 1

... HI5728/6IN - LQFP Q48.7x7A HI5728/6INZ HI5728 /6INZ - LQFP (Note) (Pb-free) HI5728EVAL1 +25 Evaluation Platform *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and ...

Page 2

Pinout ID6 ID5 ID4 ID3 ID2 ID1 ID0 (LSB) SLEEP DV DD DGND HI5728 HI5728 (48 LD LQFP) TOP VIEW ...

Page 3

Functional Block Diagram (LSB) ID0 ID1 ID2 ID3 ID4 LATCH ID5 ID6 ID7 ID8 (MSB) ID9 ICLK INT/EXT INT/EXT VOLTAGE REFERENCE REFERENCE SELECT REFLO REFIO FSADJ SLEEP (LSB) QD0 QD1 QD2 QD3 QD4 LATCH QD5 QD6 QD7 QD8 QCLK AV ...

Page 4

Typical Applications Circuit 50Ω ID6 ID5 ID4 ID3 ID2 ID1 ID0 (LSB) SLEEP DV DD 0.1µ 0.1µ 0.1µF FERRITE +5V OR +3V SUPPLY BEAD + 10µH 10µF 0.1µF 4 HI5728 I /Q CLK CLK DV DV ...

Page 5

Pin Descriptions PIN NO. PIN NAME 39, 38, 37, 36, QD9 (MSB) Through 35, 34, 33, 32, QD0 (LSB) 31 ID9 (MSB) Through 46, 47, 48 ID0 (LSB) 8 SLEEP 15 REFLO ...

Page 6

... Ld TQFP Package Maximum Power Dissipation +0. TQFP Package .930mW DD Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C +0.3V Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C DD Pb-Free Reflow Profile .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = DV = +5V Internal 1.2V, IOUTFS = 20mA REF TEST CONDITIONS = 10MHz = 25Ω (Note 7) θ ...

Page 7

Electrical Specifications AV DD per channel except for “POWER SUPPLY CHARACTERISTICS” on page 8 (Continued) PARAMETER AC CHARACTERISTICS (Per Channel) - HI5728IN - 125MHz Spurious Free Dynamic Range, f CLK SFDR Within a Window f CLK f CLK f CLK ...

Page 8

Electrical Specifications AV DD per channel except for “POWER SUPPLY CHARACTERISTICS” on page 8 (Continued) PARAMETER Input Logic High Voltage with (Note 3) 3V Supply Input Logic Low Voltage with (Note 3) 5V Supply Input Logic ...

Page 9

Typical Performance Curves, 5V Power Supply 0dBFS -12dBFS 50 0 0.2 0.4 0.6 0.8 1 1.2 OUTPUT FREQUENCY (MHz) FIGURE 1. SFDR CLOCK = 5MSPS OUT 80 0dBFS 75 -6dBFS 70 ...

Page 10

Typical Performance Curves, 5V Power Supply 100MSPS -25 -20 -15 -10 AMPLITUDE (dBFS) FIGURE 7. SFDR vs AMPLITUDE ...

Page 11

Typical Performance Curves, 5V Power Supply -20 -20 -30 -30 f OUT Combined Peak Amplitude = 0dBFS -40 -40 AMPLITUDE = 0dBFS 14dB External Analyzer Attenuation -50 -50 -60 ANALYZER ATTENUATION -60 -70 -70 -80 -80 -90 -90 -100 -100 ...

Page 12

Typical Performance Curves, 5V Power Supply FIGURE 19. POWER vs CLOCK RATE, f Typical Performance Curves, 3V Power Supply 0dBFS 65 60 -12dBFS 0.2 0.4 0.6 0.8 1 OUTPUT FREQUENCY (MHz) FIGURE 20. SFDR ...

Page 13

Typical Performance Curves, 3V Power Supply 80 0dBFS -6dBFS 60 -12dBFS OUTPUT FREQUENCY (MHz) FIGURE 24. SFDR CLOCK = 125MSPS OUT ...

Page 14

Typical Performance Curves, 3V Power Supply -40 - TEMPERATURE ( FIGURE 30. SFDR vs TEMPERATURE, CLOCK = 100MSPS -20 -30 -40 -50 -60 ANALYZER ATTENUATION -70 -80 -90 -100 ...

Page 15

Typical Performance Curves, 3V Power Supply 0.4 0.2 0 -0.2 -0.4 0 200 400 600 CODE FIGURE 36. DIFFERENTIAL NONLINEARITY FIGURE 38. POWER vs CLOCK RATE HI5728 (Continued) 0.4 0.2 0 -0.2 -0.4 800 1000 152 148 144 ...

Page 16

Timing Diagrams CLK D9-D0 I OUT t SETT t PD FIGURE 39. OUTPUT SETTLING TIME DIAGRAM CLK t SU D9-D0 I OUT t PD FIGURE 41. PROPAGATION DELAY, SETUP TIME, HOLD TIME AND MINIMUM PULSE WIDTH DIAGRAM Definition of Specifications ...

Page 17

Full Scale Gain Error, is the error from an ideal ratio of 32 between the output current and the full scale adjust current (through R ). SET Full Scale Gain Drift, is measured by setting the data inputs to all ...

Page 18

Voltage Reference The internal voltage reference of the device has a nominal value of +1.2V with a ±60 ppm/°C drift coefficient over the full temperature range of the converter recommended that a 0.1μF capacitor be placed as close ...

Page 19

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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