ISL28127MSOPEVAL1Z Intersil, ISL28127MSOPEVAL1Z Datasheet - Page 14

• Manufacturer Part Number: ISL28127MSOPEVAL1Z
• Description: EVAL BOARD FOR ISL28127 MSOP
• Manufacturer: Intersil

Specifications of ISL28127MSOPEVAL1Z

• Channels Per Ic: 1 - Single
• Amplifier Type: General Purpose
• Output Type: Single-Ended
• Slew Rate: 3.6 V/µs
• Current - Supply (main Ic): 2.2mA
• Voltage - Supply, Single/dual (±): 4.5 V ~ 40 V, ±2.25 V ~ 20 V
• Board Type: Fully Populated
• Utilized Ic / Part: ISL28127
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Current - Output / Channel: -
• -3db Bandwidth: -

Applications Information
Functional Description
The ISL28127 and ISL28227 are single and dual, low noise
10MHz BW precision op amps. Both devices are fabricated in a
new precision 40V complementary bipolar DI process. A super-
beta NPN input stage with input bias current cancellation
provides low input bias current (1nA typical), low input offset
voltage (10µV typ), low input noise voltage (3nV/√Hz), and low
1/f noise corner frequency (5Hz). These amplifiers also feature
high open loop gain (1500V/mV) for excellent CMRR (120dB)
and THD+N performance (0.0002% @ 3.5V
A complimentary bipolar output stage enables high capacitive
load drive without external compensation.
Operating Voltage Range
The devices are designed to operate over the 4.5V (±2.25V) to
40V (±20V) range and are fully characterized at 10V (±5V) and
30V (±15V). Parameter variation with operating voltage is shown
in the “Typical Performance Curves” beginning on page 8.
Input ESD Diode Protection
The input terminals (IN+ and IN-) have internal ESD protection
diodes to the positive and negative supply rails, and an additional
anti-parallel diode pair across the inputs (see Figures 38 and 39).
For unity gain applications (see Figure 38) where the output is
connected directly to the non-inverting input a current limiting
resistor (R
protect the anti-parallel differential input protection diodes.
• The amplifier input is supplied from a low impedance source.
• The input voltage rate-of-rise (dV/dt) exceeds the maximum
If the output lags far enough behind the input, the anti-parallel
input diodes can conduct. For example, if an input pulse ramps
from 0V to +10V in 1µs, then the output of the ISL28x27 will reach
only +3.6V (slew rate = 3.6V/µs) while the input is at 10V, The
input differential voltage of 6.4V will force input ESD diodes to
conduct, dumping the input current directly into the output stage
and the load. The resulting current flow can cause permanent
damage to the ESD diodes. The ESD diodes are rated to 20mA,
and in the previous example, setting R
38) would limit the current to < 6.4mA, and provide additional
protection up to ±20V at the input.
In applications where one or both amplifier input terminals are at
risk of exposure to high voltage, current limiting resistors may be
needed at each input terminal (see Figure 39 R
current through the power supply ESD diodes to 20mA.
FIGURE 38. INPUT ESD DIODE CURRENT LIMITING- UNITY GAIN
slew rate of the amplifier (±3.6V/µs).
V
IN
IN
) will be needed under the following conditions to
R
IN
+
-
V+
V-
14
IN
to 1k resistor (see Figure
RMS
R
L
, 1kHz into 2kΩ).
IN
ISL28127, ISL28227
+, R
V
IN
OUT
-) to limit
Output Current Limiting
The output current is internally limited to approximately ±45mA
at +25°C and can withstand an short circuit to either rail as long
as the power dissipation limits are not exceeded. This applies to
only 1 amplifier at a time for the dual op amp. Continuous
operation under these conditions may degrade long term
reliability.
Output Phase Reversal
Output phase reversal is a change of polarity in the amplifier
transfer function when the input voltage exceeds the supply
voltage. The ISL28127 and ISL28227 are immune to output
phase reversal, even when the input voltage is 1V beyond the
supplies.
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power supply conditions. It
is therefore important to calculate the maximum junction
temperature (T
supply voltages, load conditions, or package type need to be
modified to remain in the safe operating area. These parameters
are related using Equation 1:
where:
• P
• PD
where:
• T
• θ
• PD
• V
• I
• V
R
T
PD
JMAX
L
each amplifier in the package (PD
FIGURE 39. INPUT ESD DIODE CURRENT LIMITING -
qMAX
MAX
= Load resistance
V
MAX
JA
S
OUTMAX
DMAXTOTAL
V
IN
IN
MAX
MAX
= Total supply voltage
+
= Thermal resistance of the package
-
=
= Maximum ambient temperature
=
= Maximum quiescent supply current of 1 amplifier
T
for each amplifier can be calculated using Equation 2:
= Maximum power dissipation of 1 amplifier
V
MAX
= Maximum output voltage swing of the application
S
×
R
R
is the sum of the maximum power dissipation of
DIFFERENTIAL INPUT
+
I
JMAX
IN
IN
qMAX
θ
+
-
JA
) for all applications to determine if power
xPD
+
+
-
(
V
MAXTOTAL
S
- V
OUTMAX
V+
V-
MAX
)
×
V
------------------------
)
OUTMAX
R
L
R
L
December 16, 2010
V
OUT
FN6633.6
(EQ. 2)
(EQ. 1)