ATSTK600 Atmel, ATSTK600 Datasheet - Page 7

• Manufacturer Part Number: ATSTK600
• Description: DEV KIT FOR AVR/AVR32
• Manufacturer: Atmel
• Series: AVR®r
• Type: MCUr

Specifications of ATSTK600

• Processor To Be Evaluated: AVR and AVR32
• Data Bus Width: 8 bit
• Interface Type: RS-232, USB
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: STK600
• Silicon Family Name: AVR
• Kit Contents: Board
• Rohs Compliant: Yes
• For Use With/related Products: Atmel AVR Devices
• For Use With: ATSTK600-ATTINY10 - STK600-ATTINY10 SOCKET PACKAGE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Contents: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

AT32AP7200 Blockdiagram
Family Overview AT32AP7200
The AT32AP7200 is the second Generation full-fledged AVR32-based processor
families and expands the previous version by additional peripherals required for
multimedia systems deployed in cell phones, digital cameras, PDAs, automotive
infotainment, set top boxes, and home entertainment systems, as well as network
switches/routers and printers. The embedded Pixel-Coprocessor accelerates
processing of images and video streams and is directly connected to the core to
perform single cycle execution on processor speed.
The AT32AP7200 operates at 280 DMIPS with a 200 MHz clock. It features 32K bytes
of SRAM directly connected to the high-speed bus matrix, an external bus interface
with controllers for SDRAM and static memories including NAND Flash and Com-
pactFlash™ with ECC. Its extensive peripheral set includes a USB High Speed Host
interface, a High-Speed On-The-Go interface, one 10/100 Base-T Ethernet MAC,
Multimedia Card Interface (MCI), a LCD-Controller for TFT and STN Displays with
a Image Post Processor, Synchronous Serial Controllers (SSC), USARTs, Master/
Slave Serial Peripheral Interfaces (SPI), two three-channel 16-bit Timer Counter
(TC), a Two Wire Interface (TWI) and a six-channel 10-bit ADC with Touch Screen
support. Up to six GPIO Controller (each 32-bit wide) are selecting general I/O’s
or do connect the peripherals to dedicated pins via multiplexer. Peripheral DMA
channels maximize the data throughput between these interfaces and the on- and
off-chip memories.
The AT32AP7200 is available in a 324-ball BGA RoHS-compliant package providing
up to 189 GPIO multiplexed with peripherals.
AT32AP7200 Development Tools
The AT32AP7200 will be supported by a future evaluation board and the existing
AT90JTAGICE-mkII debugger. The evaluation board will be designed for industrial
use with pre-installed Linux Image and may be ordered in high quantities as well.
All related Software and documentation may be downloaded via www.atmel.com/
products/avr32 :
ATSTK1000 is equipped with AT32AP7000-CTUT (BGA).
MSC’s AT32AP7200-Startup Paket gives you all you need for your first AP7000 de-
sign: The Evaluation Board and the AT90JTAGICE-mkII. The BSP and Linux Kernel is
supported by Atmel and can be downloaded free of cost.
- Ready to use example projects
- Linux demonstration software
- Getting Started Application Notes
- Schematics, BOM and Gerber files
- Free Atmel tools (Linux Kernel and BSP)
Schematics, BOM, Gerber etc. provided by Atmel.
AT32AP7200 in brief
Ext. Bus interface
LCD Contr.
Audio DAC
Oscillators
Watchdog
USB UDP
Ethernet
TWI (I²C)
U(S)ART
MMC IF
Caches
Keypad
System
Debug
SRAM
16-bit
MPOP
DIE IF
Flash
MMU
PWM
AC97
CPU
Boot
UHP
ADC
SSC
RTT
SPI
Communication
Multimedia
Memory
System
NAND (ECC), CompactFlash™
Timer
Misc.
1 x MAC 10/100 RMII/MII
JTAG / Nexus Class III
Media Post Processor
Touch Screen Support
POR, Shut Down Ctrl.
9-layer AHB Matrix
Pixel-Coprocessor
16/32-bit dynamic,
1 x Rotary Encoder
1 with DMA / 4 Ch.
2048 x 2048 24-bit
8/16/32-bit static,
1 USB2.0 HS Host
6 x with Cap/Com
1 USB2.0 HS OTG
2 (Master/Slave)
3 x Osc., 3 x PLL
AVR32, 200MHz
16K-I, 16K-D
4 ch / 20-bit
6 with DMA
3 with DMA
with DMA
2 x 32KB
EBI CS0
yes
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