EVAL-ADF4106EB1 Analog Devices Inc, EVAL-ADF4106EB1 Datasheet - Page 20

BOARD EVAL FOR ADF4106

EVAL-ADF4106EB1

Manufacturer Part Number
EVAL-ADF4106EB1
Description
BOARD EVAL FOR ADF4106
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-ADF4106EB1

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
ADF4106
OUTLINE DIMENSIONS
INDICATOR
SEATING
PLANE
1.00
0.85
0.80
PIN 1
12° MAX
0.15
0.05
4.50
4.40
4.30
PIN 1
Figure 26. 20-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
Figure 25. 16-Lead Thin Shrink Small Outline Package [TSSOP]
BSC
0.65
TOP VIEW
BSC SQ
4.00
16
1
0.80 MAX
0.65 TYP
0.30
0.23
0.18
COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-1
COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-153-AB
5.10
5.00
4.90
0.10
4 mm × 4 mm Body, Very Thin Quad
Dimensions shown in millimeters
Dimensions shown in millimeters
0.30
0.19
BCS SQ
3.75
0.20 REF
9
8
Rev. C | Page 20 of 24
1.20
MAX
SEATING
PLANE
BSC
6.40
0.05 MAX
0.02 NOM
COPLANARITY
(CP-20-1)
(RU-16)
0.60 MAX
0.08
0.20
0.09
BSC
0.75
0.60
0.50
0.50
0.60 MAX
15
11
16
10
(BOTTOM VIEW)
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
EXPOSED
PAD
20
6
1
5
2.25
2.10 SQ
1.95
0.75
0.60
0.45
0.25 MIN

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