KS8995MA-EVAL Micrel Inc, KS8995MA-EVAL Datasheet - Page 37
KS8995MA-EVAL
Manufacturer Part Number
KS8995MA-EVAL
Description
BOARD EVAL EXPERIMENT KS8995MA
Manufacturer
Micrel Inc
Datasheet
1.KS8995MA-EVAL.pdf
(79 pages)
Specifications of KS8995MA-EVAL
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
576-1018
- Current page: 37 of 79
- Download datasheet (619Kb)
Semptember 2008
Notes:
1.
Pin #
113
114
128
86
87
90
91
NC = No connect.
Ipd = Input w/internal pull-down.
Ipd/O = Input w/internal pull-down during reset, output pin otherwise.
Otri = Output tristated.
Pin Name
SCONF1
SCONF0
LED5-2
LED5-1
TEST2
PS1
PS0
PU/PD
Ipu/O
Ipu/O
Ipd
Ipd
Ipd
Ipd
NC
(1)
Description
Dual MII configuration pin.
mode and PHY mode, KSZ8995FQ supports PHY mode only.
Pins 91, 86, 87
000
001
010
011
100
101
110
111
Dual MII configuration pin.
LED indicator 2. Strap option: Aging setup. See “Aging” section PU (default) =
aging enable; PD = aging disable.
LED indicator 1. Strap option: PU (default): enable PHY[5] MII I/F. PD: tristate
all PHY[5] MII output. See “Pin 86 SCONF1.”
Serial bus configuration pin. For this case, if the EEPROM is not present, the
KS8995MA/FQ will start itself with the PS[1:0] = 00 default register values .
Pin Configuration
PS[1:0]=00
PS[1:0]=01
PS[1:0]=10
PS[1:0]=11
Serial bus configuration pin. See “Pin 113.”
NC for normal operation. Factory test pin.
(1)
37
For the Switch MII, KSZ8995MA supports both MAC
Switch MII
Disable, Otri
PHY Mode MII
MAC Mode MII
PHY Mode SNI
Disable
PHY Mode MII
MAC Mode MII
PHY Mode SNI
Serial Bus Configuration
I
Reserved
SPI Slave Mode for CPU Interface
Factory Test Mode (BIST)
2
C Master Mode for EEPROM
PHY [5] MII
Disable, Otri
Disable, Otri
Disable, Otri
Disable, Otri
Disable
PHY Mode MII
PHY Mode MII
PHY Mode MII
M9999-091508
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