CY2213 Cypress Semiconductor Corp., CY2213 Datasheet
CY2213
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CY2213 Summary of contents
Page 1
... Enables application compatibility PLL xM S VDD VSS CLK CLKB VSS VDD SER DATA • 3901 North First Street • CY2213 Clock Generator Benefits CLK CLKB , San Jose CA 95134 • 408-943-2600 Revised May 23, 2003 ...
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... S clk controlled by the master device. S data data line. The CY2213 is a slave device and can either read or write information on the dataline upon request from the master device. Figure 1 shows the basic bus connections between master and slave device. The buses are shared by a number of devices and are pulled high by a pull-up resistor ...
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... Serial Interface Programming for the CY2213 b7 b6 Data0 QCNTBYP SELPQ Data1 P<7> P<6> Data2 Reserved Reserved To program the CY2213 using the two-wire serial interface, set the SELPQ bit HIGH. The default setting of this bit is LOW. The P and Q values are determined by the following formulas final 7.. final 5 ...
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... Document #: 38-07263 Rev VCO P PLL Figure 4. PLL Block Diagram Description , or V with respect to ground DD DDX Description Description s to reach minimum specified voltage DD Description [1] Description DD DD Description CY2213 Output Min. Max. Unit –0.5 4.0 V –0 Min. Max. Unit 10 31.25 MHz Min. Max. ...
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... CLK/CLKB outputs settled. DDX Min. Max. 8.00 (125 MHz) 0.25% 20 6.25/5 1.75% 140 55 43.75/35 0.25% 20 6.25/5 2.0% 160 65 50/40 1.75% 140 43.75/35 2.5% 200 62.5/50 3.5% 280 87.5/70 –107 – 100 400 8 MHz (–20 dB) CY2213 Unit CYCLE CYCLE CYCLE CYCLE CYCLE CYCLE CYCLE ps ps dBc % ps ...
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... Functional Specifications Crystal Input The CY2213 receives its reference from an external crystal. Pin XIN is the reference crystal input, and pin XOUT is the reference crystal feedback. The parameters for the crystal are given on page 5 of this data sheet. The oscillator circuit requires external capacitors. Please refer to the application note entitled Crystal Oscillator Topics for details ...
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... This section defines the voltage and timing waveforms for the input and output pins of the CY2213. The Device Characteristics tables list the specifica- tions for the device parameters that are defined here. Table 1. Definition of Device Parameters ...
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... Figure 11. Cycle-to-cycle Jitter Cycle i tPW+,i+1 tCYCLE,i – t over many consecutive cycles DC,ERR PW+,i PW+,i+1 Figure 12. Cycle-to-cycle Duty Cycle Error t min t max – t JLT max min over many cycles Figure 13. Long-term Jitter is defined as the long-term JLT Cycle i+1 tPW+,i tCYCLE, i+1 CY2213 Page ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. Operating Range Operating Voltage Commercial, to 400 MHz Commercial, to 500 MHz CY2213 3.3V 3.3V 3.3V 3.3V 51-85091-** ...
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... Document History Page Document Title: CY2213 High-Frequency Programmable PECL Clock Generator Document Number: 38-07263 Orig. of REV. ECN NO. Issue Date Change ** 113090 02/06/02 DSG *A 113512 05/24/02 CKN *B 121882 12/14/02 RBI *C 123215 12/19/02 LJN *D 124012 03/05/03 CKN *E 126557 05/27/03 RGL Document #: 38-07263 Rev. *E Description of Change Change from Spec number: 38-01100 to 38-07263 ...