PIC12F509-I/MC Microchip Technology, PIC12F509-I/MC Datasheet
PIC12F509-I/MC
Specifications of PIC12F509-I/MC
Related parts for PIC12F509-I/MC
PIC12F509-I/MC Summary of contents
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... Flash Microcontrollers © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Preliminary Data Sheet DS41236D ...
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... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Flash Microcontrollers Devices Included In This Data Sheet: • PIC12F508 • PIC12F509 • PIC16F505 High-Performance RISC CPU: • Only 33 Single-Word Instructions to Learn • All Single-Cycle Instructions Except for Program Branches, which are Two-Cycle • 12-Bit Wide Instructions • 2-Level Deep Hardware Stack • ...
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... DD 13 RB5/OSC1/CLKIN 2 3 RB4/OSC2/CLKOUT 12 RB3/MCLR RC5/T0CKI 6 9 RC4 RC3 8 7 DFN V DD GP5/OSC1/CLKIN GP4/OSC2 GP3/MCLR/V PP Program Memory Device Flash (words) PIC12F508 PIC12F509 PIC16F505 DS41236D-page 2 PDIP, SOIC, MSOP RB0/ICSPDAT GP5/OSC1/CLKIN RB1/ICSPCLK GP4/OSC2 RB2 GP3/MCLR/V PP RC0 RC1 RC2 GP0/ICSPDAT GP1/ICSPCLK 5 GP2/T0CKI 4 Data Memory ...
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... When contacting a sales office or the literature center, please specify which device, revision of silicon and data sheet (include literature number) you are using. Customer Notification System Register on our web site at www.microchip.com/cn to receive the most current information on all of our products. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Preliminary DS41236D-page 3 ...
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... PIC12F508/509/16F505 NOTES: DS41236D-page 4 Preliminary © 2007 Microchip Technology Inc. ...
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... PLDs in larger systems and coprocessor applications). while ® PC and PIC12F508 4 512 25 TMR0 Yes 5 1 Yes Yes 33 8-pin PDIP, SOIC, 8-pin PDIP, SOIC, MSOP, DFN Preliminary PIC12F509 PIC16F505 4 20 1024 1024 41 72 TMR0 TMR0 Yes Yes Yes Yes Yes Yes ...
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... PIC12F508/509/16F505 NOTES: DS41236D-page 6 Preliminary © 2007 Microchip Technology Inc. ...
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... Flash devices but with all Flash locations and fuse options already programmed by the factory. Certain code and prototype verification procedures do apply before production shipments are available. Please contact your local Microchip Technology sales office for more details. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 2 ...
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... PIC12F508/509/16F505 NOTES: DS41236D-page 8 Preliminary © 2007 Microchip Technology Inc. ...
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... PIC12F508/509/16F505 MEMORY Memory Device Program PIC12F508 512 x 12 PIC12F509 1024 x 12 PIC16F505 1024 x 12 The PIC12F508/509/16F505 devices can directly or indirectly address its register files and data memory. All Special Function Registers (SFR), including the PC, are mapped in the data memory. The PIC12F508/509/ ...
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... Stack 1 Stack 2 File Registers RAM Addr 9 Addr MUX Indirect 5 Direct Addr 5-7 Addr FSR Reg Status Reg 3 MUX Device Reset Timer ALU Power-on Reset 8 Watchdog W Reg Timer Timer0 Preliminary GPIO GP0/ISCPDAT GP1/ISCPCLK GP2/T0CKI GP3/MCLR/V PP GP4/OSC2 GP5/OSC1/CLKIN © 2007 Microchip Technology Inc. ...
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... Legend Input Output, I/O = Input/Output Power, — = Not used, TTL = TTL input Schmitt Trigger input High Voltage © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Output Type TTL CMOS Bidirectional I/O pin. Can be software programmed for internal weak pull-up and wake-up from Sleep on pin change. ...
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... RAM Addr 9 Addr MUX Indirect 5 5-7 Addr FSR Reg Status Reg 3 MUX Timer Power-on ALU Reset 8 Watchdog W Reg Timer Internal RC OSC Timer0 Preliminary PORTB RB0/ICSPCLK RB1/ICSPDAT RB2 RB3/MCLR/V PP RB4/OSC2/CLKOUT RB5/OSC1/CLKIN PORTC RC0 RC1 RC2 RC3 RC4 RC5/T0CKI © 2007 Microchip Technology Inc. ...
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... Legend Input Output, I/O = Input/Output Power, — = Not used, TTL = TTL input Schmitt Trigger input High Voltage © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Output Type TTL CMOS Bidirectional I/O pin. Can be software programmed for internal weak pull-up and wake-up from Sleep on pin change. ...
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... Q2, Q3 and Q4 cycles. Data memory is read during Q2 (operand read) and written during Q4 (destination write Fetch INST ( Execute INST (PC) Execute 1 Fetch 2 Execute 2 Fetch 3 Execute 3 Fetch 4 Preliminary Internal phase clock Fetch INST ( Execute INST ( Flush Fetch SUB_1 Execute SUB_1 © 2007 Microchip Technology Inc. ...
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... For devices with more than 512 bytes of program memory, a paging scheme is used. Program memory pages are accessed using one Status register bit. For the PIC12F509 and PIC16F505, with data memory register files of more than 32 registers, a banking scheme is used. Data memory banks are accessed using the File Select Register (FSR) ...
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... GENERAL PURPOSE REGISTER 0000h FILE The General Purpose Register file is accessed, either directly or indirectly, through the File Select Register (FSR). See Section 4.9 “Indirect Data Addressing: INDF and FSR Registers”. 01FFh 0200h 03FFh 0400h 7FFh Preliminary © 2007 Microchip Technology Inc. ...
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... Bank 0. 2Fh 4Fh 6Fh 30h 50h 70h General General Purpose Purpose Registers Registers 3Fh 5Fh 7Fh Bank 1 Bank 2 Preliminary PIC12F509 REGISTER FILE MAP 0 1 (1) INDF 20h TMR0 PCL Addresses map STATUS back to FSR addresses in Bank 0. GPIO 2Fh 30h General Purpose ...
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... Other (non Power-up) Resets include external Reset through MCLR, Watchdog Timer and wake-up on pin change Reset Reset was due to wake-up on pin change, then bit All other Resets will cause bit PIC12F509 only. 5: This bit is used on the PIC12F509. For code compatibility do not use this bit on the PIC12F508. DS41236D-page 18 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ...
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... Note 1: If Reset was due to wake-up on pin change, then bit All other Resets will cause bit Other (non Power-up) Resets include external reset through MCLR, Watchdog Timer and wake-up on pin change Reset. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Bit 5 Bit 4 Bit 3 ...
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... A carry occurred carry did not occur Note 1: This bit is used on the PIC12F509. For code compatibility do not use this bit on the PIC12F508. DS41236D-page 20 For example, CLRF STATUS, will clear the upper three bits and set the Z bit. This leaves the STATUS register as 000u u1uu (where u = unchanged) ...
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... A borrow from the 4th low-order bit of the result did not occur borrow from the 4th low-order bit of the result occurred bit 0 C: Carry/Borrow bit (for ADDWF, SUBWF and RRF, RLF instructions) ADDWF carry occurred carry did not occur borrow occurred © 2007 Microchip Technology Inc. PIC12F508/509/16F505 R-1 R-1 R/W Unimplemented bit, read as ‘ ...
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... If the T0CS bit is set to ‘1’, it will override the TRIS function on the T0CKI pin. W-1 W-1 T0SE PSA U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared /4 OSC 128 256 1 : 128 Preliminary W-1 W-1 W-1 PS2 PS1 PS0 bit Bit is unknown © 2007 Microchip Technology Inc. ...
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... PS<2:0>: Prescaler Rate Select bits Bit Value Timer0 Rate WDT Rate 000 001 010 011 100 101 110 111 © 2007 Microchip Technology Inc. PIC12F508/509/16F505 W-1 W-1 T0SE PSA U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared /4 OSC ...
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... After you move in the calibration constant, do not change the value. See Section 7.2.5 “Internal 4 MHz RC Oscillator”. R/W-1 R/W-1 R/W-1 CAL3 CAL2 CAL1 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared Preliminary R/W-0 R/W-1 CAL0 — bit Bit is unknown © 2007 Microchip Technology Inc. ...
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... PCL Instruction Word Reset to ‘0’ PA0 7 0 Status © 2007 Microchip Technology Inc. PIC12F508/509/16F505 4.7.1 EFFECTS OF RESET The PC is set upon a Reset, which means that the PC addresses the last location in the last page (i.e., the oscillator calibration instruction). After executing MOVLW XX, the PC will roll over to location 00h and begin executing user code ...
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... The FSR<4:0> bits are used to select data memory addresses 00h to 1Fh. PIC12F508 – Does not use banking. FSR <7:5> are unimplemented and read as ‘1’s. PIC12F509 – Uses FSR<5>. Selects between bank 0 and bank 1. FSR<7:6> are unimplemented, read as ‘1’. PIC16F505 – Uses FSR<6:5>. Selects from bank 0 to bank 3. FSR< ...
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... Direct Addressing (FSR (opcode) Bank Select Location Select 00h Data 0Fh (1) Memory 10h Note 1: For register map detail, see Section 4.3 “Data Memory Organization”. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Addresses map back to addresses in Bank 0. 1Fh 3Fh 5Fh 7Fh Bank 0 ...
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... PIC12F508/509/16F505 NOTES: DS41236D-page 28 Preliminary © 2007 Microchip Technology Inc. ...
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... The TRIS registers are “write-only” and are set (output drivers disabled) upon Reset. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 5.4 I/O Interfacing The equivalent circuit for an I/O port pin is shown in Figure 5-2 ...
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... PS0 1111 1111 1111 1111 PS0 1111 1111 1111 1111 (3) C 0-01 1xxx q00q quuu (3) C 0-01 1xxx q00q quuu GP0 --xx xxxx --uu uuuu RB0 --xx xxxx --uu uuuu RC0 --xx xxxx --uu uuuu © 2007 Microchip Technology Inc. ...
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... Instruction Fetched MOVWF PORTB MOVF PORTB, W RB<5:0> Port pin written here Instruction Executed MOVWF PORTB (Write to PORTB) © 2007 Microchip Technology Inc. PIC12F508/509/16F505 EXAMPLE 5-1: ;Initial PORTB Settings ;PORTB<5:3> Inputs ;PORTB<2:0> Outputs ; ; ; BCF PORTB, 5 ;--01 -ppp BCF PORTB, 4 ;--10 -ppp MOVLW 007h ...
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... PIC12F508/509/16F505 NOTES: DS41236D-page 32 Preliminary © 2007 Microchip Technology Inc. ...
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... Fetch Timer0 Instruction Executed © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Counter mode is selected by setting the T0CS bit (OPTION<5>). In this mode, Timer0 will increment either on every rising or falling edge of pin T0CKI. The T0SE bit (OPTION<4>) determines the source edge. Clearing the T0SE bit selects the rising edge. Restric- tions on the external clock input are discussed in detail in Section 6.1 “ ...
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... Read TMR0 Read TMR0 reads NT0 + 1 reads NT0 reads NT0 + 2 Value on Value on Bit 0 Power-On All Other Reset Resets xxxx xxxx uuuu uuuu PS0 1111 1111 1111 1111 PS0 1111 1111 1111 1111 --11 1111 --11 1111 RC0 --11 1111 --11 1111 © 2007 Microchip Technology Inc. ...
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... Timer0 input = ± External clock if no prescaler selected; prescaler output otherwise. 3: The arrows indicate the points in time where sampling occurs. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 When a prescaler is used, the external clock input is divided by the asynchronous ripple counter-type prescaler, so that the prescaler output is symmetrical ...
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... WDT is disabled. A CLRWDT instruction should be executed before switching the prescaler. EXAMPLE 6-2: CHANGING PRESCALER (WDT → TIMER0) CLRWDT ;Clear WDT and ;prescaler MOVLW ‘xxxx0xxx’ ;Select TMR0, new ;prescale value and ;clock source OPTION Preliminary © 2007 Microchip Technology Inc. ...
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... T0SE Watchdog Timer PSA WDT Enable bit Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register. 2: T0CKI is shared with pin RC5 on the PIC16F505 and pin GP2 on the PIC12F508/509. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Sync Cycles T0CS ...
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... PIC12F508/509/16F505 NOTES: DS41236D-page 38 Preliminary © 2007 Microchip Technology Inc. ...
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... Code Protection • ID Locations • In-Circuit Serial Programming™ • Clock Out © 2007 Microchip Technology Inc. PIC12F508/509/16F505 The PIC12F508/509/16F505 devices have a Watchdog Timer, which can be shut off only through configuration bit WDTE. It runs off of its own RC oscillator for added reliability ...
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... Refer to the “PIC12F508/509 Memory Programming Specifications” (DS41227) to determine how to access the Configuration Word. The Configuration Word is not user addressable during device operation. DS41236D-page 40 (1) — — — MCLRE Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared DD Preliminary WDTE FOSC1 FOSC0 bit Bit is unknown © 2007 Microchip Technology Inc. ...
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... EC oscillator/RB4 function on RB4/OSC2/CLKOUT pin 010 = HS oscillator 001 = XT oscillator 000 = LP oscillator Refer to the “PIC16F505 Memory Programming Specifications” (DS41226) to determine how to access Note 1: the Configuration Word. The Configuration Word is not user addressable during device operation. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 (1) — — MCLRE CP WDTE U = Unimplemented bit, read as ‘ ...
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... OSC CONFIGURATION) PIC12F508/509 OSC1 PIC16F505 Sleep XTAL ( internal logic OSC2 (2) RS EXTERNAL CLOCK INPUT OPERATION (HS OSC CONFIGURATION) OSC1 PIC12F508/509 PIC16F505 Open OSC2 CAPACITOR SELECTION FOR CERAMIC RESONATORS – (1) PIC12F508/509/16F505 Cap. Range Cap. Range Freq 10-47 pF 10-47 pF © 2007 Microchip Technology Inc. ...
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... RESONANT CRYSTAL OSCILLATOR CIRCUIT To Other Devices 74AS04 4.7k CLKIN 74AS04 PIC16F505 PIC12F508 PIC12F509 10k XTAL 20 pF EXTERNAL SERIES RESONANT CRYSTAL OSCILLATOR CIRCUIT To Other Devices 330 74AS04 74AS04 CLKIN PIC16F505 PIC12F508 PIC12F509 ) values, and the operat- EXT between 5.0 kΩ and EXT DS41236D-page 43 ...
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... See Register 4-5 for more information. Internal clock Note: The 0 bit of OSCCAL is unimplemented and should be written as ‘0’ when modify- ing OSCCAL for compatibility with future PIC16F505 devices. PIC12F508 PIC12F509 for Preliminary © 2007 Microchip Technology Inc. ...
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... See Table 7-5 for Reset value for specific conditions Reset was due to wake-up on pin change, then bit All other Resets will cause bit PIC12F509 only. 5: PIC12F508 only. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Some registers are not reset in any way, they are unknown on POR and unchanged in any other Reset. Most other registers are reset to “ ...
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... STATUS Addr: 03h 0001 1xxx 000u uuuu 0001 0uuu 0000 0uuu 0000 uuuu 1001 0uuu Preliminary © 2007 Microchip Technology Inc. (1) qqqq qqqu uuuu uuuu uuuu uuuu 1111 1111 (2), (3) q00q quuu 1uuu uuuu uuuu uuu- --uu uuuu ...
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... Reset until the operating parameters are met. A simplified block diagram of the on-chip Power-on Reset circuit is shown in Figure 7-7. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 The Power-on Reset circuit and the Device Reset Timer (see Section 7.5 “Device Reset Timer (DRT)”) circuit are closely related ...
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... Internal Reset FIGURE 7-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO V TIME V DD MCLR Internal POR DRT Time-out Internal Reset DS41236D-page 48 POR (Power-on Reset) MCLR Reset Start-up Timer (10 μ ms) TDRT Preliminary CHIP Reset TDRT ): FAST V RISE DD DD © 2007 Microchip Technology Inc. ...
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... V DD MCLR Internal POR DRT Time-out Internal Reset Note: When V rises slowly, the T DD value. In this example, the chip will reset properly if, and only if, V1 ≥ V © 2007 Microchip Technology Inc. PIC12F508/509/16F505 V1 TDRT time-out expires long before V DRT DD Preliminary ): SLOW V RISE DD ...
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... WDT. This gives the maximum Sleep time before a WDT wake-up Reset. Preliminary DRT (DEVICE RESET TIMER PERIOD) Subsequent POR Reset Resets 10 μs (typical (typical (typical (typical) 10 μs (typical (typical) and part-to-part pro Min., Temperature DD © 2007 Microchip Technology Inc. ...
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... N/A OPTION GPWU GPPU T0CS (2) N/A OPTION RBWU RBPU Legend: Shaded boxes = Not used by Watchdog Timer. – = unimplemented, read as ‘0’ unchanged. Note 1: PIC12F508/509 only. 2: PIC16F505 only. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 0 M Postscaler Postscaler 8-to-1 MUX PSA To Timer0 0 1 MUX ...
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... Microchip Technology’s MCP809 micro- controller supervisor. There are 7 different trip point selections to accommodate systems. goes DD Preliminary BROWN-OUT PROTECTION CIRCUIT PIC16F505 PIC12F508 Q1 (2) PIC12F509 MCLR (1) 40k is below a certain level such 0. BROWN-OUT PROTECTION CIRCUIT MCLR PIC16F505 PIC12F508 PIC12F509 © 2007 Microchip Technology Inc. ...
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... Sleep, a wake-up will occur immediately even if no pins change while in Sleep mode. The WDT is cleared when the device wakes from Sleep, regardless of the wake-up source. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 7.10 Program Verification/Code Protection If the code protection bit has not been programmed, the on-chip program memory can be read out for verification purposes ...
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... PIC12F508/509/16F505 FIGURE 7-15: TYPICAL IN-CIRCUIT SERIAL PROGRAMMING CONNECTION To Normal Connections External Connector Signals + MCLR/V PP GP1/RB1 CLK Data I/O GP0/RB0 Normal Connections DS41236D-page 54 PIC16F505 PIC12F508 PIC12F509 PP Preliminary © 2007 Microchip Technology Inc. ...
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... Register bit field ∈ In the set of User defined term (font is courier) italics © 2007 Microchip Technology Inc. PIC12F508/509/16F505 All instructions are executed within a single instruction cycle, unless a conditional test is true or the program counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles. One instruction cycle consists of four oscillator periods ...
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... Preliminary © 2007 Microchip Technology Inc. Status Notes Affected LSb C, DC ffff ffff Z 4 ffff Z 0000 Z ffff ffff None 2, 4 ffff ffff None ...
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... The contents of the W register are AND’ed with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 BCF Bit Clear f Syntax: [ label ] BCF 0 ≤ ...
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... Operation: Status Affected: Z Description: The contents of register ‘f’ are complemented. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. Preliminary © 2007 Microchip Technology Inc. f,d ...
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... Status Affected: None Description: GOTO is an unconditional branch. The 9-bit immediate value is loaded into PC bits <8:0>. The upper bits of PC are loaded from STATUS<6:5>. GOTO is a two- cycle instruction. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 INCF Increment f Syntax: [ label ] 0 ≤ f ≤ 31 Operands: d ∈ ...
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... None Operation: No operation Status Affected: None Description: No operation. OPTION Load OPTION Register Syntax: [ label ] Operands: None (W) → OPTION Operation: Status Affected: None Description: The content of the W register is loaded into the OPTION register. Preliminary © 2007 Microchip Technology Inc. MOVWF f NOP OPTION ...
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... Carry flag. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘f’. C register ‘f’ © 2007 Microchip Technology Inc. PIC12F508/509/16F505 SLEEP Syntax: Operands: Operation: Status Affected: TO, PD, RBWUF ...
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... Status Affected: Z Description: Exclusive OR the contents of the W register with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. Preliminary © 2007 Microchip Technology Inc. f,d ...
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... PICSTART Plus Development Programmer - MPLAB PM3 Device Programmer - PICkit™ 2 Development Programmer • Low-Cost Demonstration and Development Boards and Evaluation Kits © 2007 Microchip Technology Inc. PIC12F508/509/16F505 9.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market ...
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... MPLAB C30 C Compilers, and the MPASM and MPLAB ASM30 Assemblers. The software simulator offers the flexibility to develop and debug code outside of the hardware laboratory environment, making it an excellent, economical software development tool. Preliminary ® DSCs on an instruction © 2007 Microchip Technology Inc. ...
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... Microchip Technology Inc. PIC12F508/509/16F505 9.9 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD ...
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... Sigma-Delta ADC, flow rate sensing, plus many more. Check the Microchip web page (www.microchip.com) and the latest “Product Selector Guide” (DS00148) for the complete list of demonstration, development and evaluation kits. Preliminary © 2007 Microchip Technology Inc. ® L security ICs, CAN ® ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 ............................................................................... -0. )...................................................................................................................± ...
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... V DD (Volts) 4.0 3.5 3.0 2.5 2.0 0 FIGURE 10-2: MAXIMUM OSCILLATOR FREQUENCY TABLE LP XT INTOSC EXTRC ( 200 kHz Note 1: For PIC16F505 only. DS41236D-page 68 (PIC16F505 only Frequency (MHz) 4 MHz Frequency (MHz) Preliminary ≤ +125° MHz © 2007 Microchip Technology Inc. ...
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... For standby current measurements, the conditions are the same as IDD, except that the device is in Sleep mode module current is listed, the current is for that specific module enabled and the device in Sleep. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Standard Operating Conditions (unless otherwise specified) Operating Temperature -40° ...
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... Reset (POR)" for details See Section 7.4 "Power-on Reset (POR)" for details MHz 2.0V OSC MHz 5.0V OSC MHz 3.0V OSC MHz 5.0V OSC DD (PIC16F515 only kHz 2.0V OSC kHz 5.0V OSC T0CKI = V , MCLR = SS DD © 2007 Microchip Technology Inc. ...
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... This specification applies when GP3/RB3/MCLR is configured as an input with pull-up disabled. The leakage current of the MCLR circuit is higher than the standard I/O logic. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Standard Operating Conditions (unless otherwise specified) -40°C ≤ T ≤ +85°C (industrial) ...
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... Preliminary Max. 186K 187K 190K 190K 33K 34K 35K 35K 96K 116K 116K 119K 22K 23K 28K 29K © 2007 Microchip Technology Inc. ...
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... Uppercase letters and their meanings Fall H High I Invalid (high-impedance) L Low FIGURE 10-3: LOAD CONDITIONS – PIC12F508/509/16F505 pin FIGURE 10-4: EXTERNAL CLOCK TIMING – PIC12F508/509/16F505 Q4 OSC1 © 2007 Microchip Technology Inc. PIC12F508/509/16F505 T Time mc MCLR osc Oscillator os OSC1 t0 T0CKI wdt Watchdog Timer P Period R Rise ...
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... LP Oscillator mode only) LP Oscillator mode XT Oscillator mode EC, HS Oscillator mode (PIC16F505 only) LP Oscillator mode EXTRC Oscillator mode XT Oscillator mode HS Oscillator mode (PIC16F505 only) LP Oscillator mode XT Oscillator LP Oscillator EC, HS Oscillator (PIC16F505 only) XT Oscillator LP Oscillator EC, HS Oscillator (PIC16F505 only) © 2007 Microchip Technology Inc. ...
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... I/O Pin Old Value (output) Note: All tests must be done with specified capacitive loads (see data sheet I/O pins and CLKOUT. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Standard Operating Conditions (unless otherwise specified) -40°C ≤ T Operating Temperature -40°C ≤ T Freq Min. Typ† ...
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... A -40°C ≤ T ≤ +125°C (extended) A range is described in Section 10.1 "Power-on Reset (POR)" DD Characteristic (2), (3) (2) (3) ( Preliminary (1) Min. Typ Max. Units — — 100 — — — — ns — 10 25** ns — © 2007 Microchip Technology Inc. ...
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... These parameters are characterized but not tested. Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Standard Operating Conditions (unless otherwise specified) Operating Temperature -40°C ≤ T -40° ...
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... Section 10.1 "Power-on Reset (POR)" Min. Typ No Prescaler 0 20* CY With Prescaler 10* No Prescaler 0 20* CY With Prescaler 10 40 Preliminary (1) Max. Units Conditions — — ns — — ns — — ns — — ns — — ns Whichever is greater Prescale Value (1, 2, 4,..., 256) © 2007 Microchip Technology Inc. ...
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... 1,400 Typical: Statistical Mean @25°C 1,200 Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 1,000 800 600 400 200 0 2.0 2.5 © 2007 Microchip Technology Inc. PIC12F508/509/16F505 = 4 MHz OSC 4 MHz 4 MHz 3.0 3.5 4.0 V (V) DD Preliminary Maximum Typical 4.5 5.0 5.5 ...
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... DS41236D-page 80 ( PIC16F505 DD ODE ONLY Max. 3V Typical Fosc (MHz) vs. V (SLEEP MODE, ALL PERIPHERALS DISABLED) DD Typical (Sleep Mode all Peripherals Disabled) 3.0 3.5 4.0 V (V) DD Preliminary ) Max. 5V Typical 4.5 5.0 5.5 © 2007 Microchip Technology Inc. ...
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... Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3σ 7 (-40°C to 125° 2.0 2.5 © 2007 Microchip Technology Inc. PIC12F508/509/16F505 vs. V (SLEEP MODE, ALL PERIPHERALS DISABLED) DD Maximum (Sleep Mode all Peripherals Disabled) Max. 125°C Max. 85°C 3.0 3.5 4.0 V ...
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... Max. 125°C Max. 85°C 3.0 3.5 4.0 V (V) DD (1) Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 3.0 3.5 4.0 V (V) DD Preliminary 4.5 5.0 5.5 OVER TEMPERATURE (NO DD 4.5 5.0 5.5 © 2007 Microchip Technology Inc. ...
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... Maximum: Mean (Worst-Case Temp) + 3σ Maximum: Meas + 3 (-40°C to 125°C) 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.00 5.0 5.5 6.0 © 2007 Microchip Technology Inc. PIC12F508/509/16F505 = 3.0V) DD (VDD = 3V, -40×C TO 125×C) Typical 25°C Min. -40°C 6.5 7.0 7.5 8.0 I (mA ...
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... DS41236D-page 84 = 3.0V) DD -1.5 -2.0 -2.5 I (mA 5.0V -1.5 -2.0 -2.5 -3.0 -3.5 I (mA) OH Preliminary Max. -40°C Typ. 25°C Min. 125°C -3.0 -3.5 -4.0 Max. -40°C Typ. 25°C Min. 125°C -4.0 -4.5 -5.0 © 2007 Microchip Technology Inc. ...
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... Typical: Statistical Mean @25°C 3.5 Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 3.0 2.5 2.0 1.5 1.0 0.5 2.0 2.5 © 2007 Microchip Technology Inc. PIC12F508/509/16F505 vs (TTL Input, -40×C TO 125×C) Max. -40°C Typ. 25°C Min. 125°C 3.0 3.5 4.0 ...
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... PIC12F508/509/16F505 NOTES: DS41236D-page 86 Preliminary © 2007 Microchip Technology Inc. ...
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... Microchip part number, year code, week code, and traceability code. For PIC device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Example ...
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... XXXXXXXXXXXXXX YYWWNNN 14-Lead SOIC (3.90 mm) XXXXXXXXXXX XXXXXXXXXXX YYWWNNN 14-Lead TSSOP (4.4 mm) XXXXXXXX YYWW NNN TABLE 12-1: 8-LEAD 2X3 DFN (MC) TOP MARKING Part Number PIC12F508 (T) - I/MC PIC12F508-E/MC PIC12F509 (T) - I/MC PIC12F509-E/MC DS41236D-page 88 Example PIC16F505 -I/P 0215 e 3 0410017 Example PIC16F505-E /SL0125 0431017 Example ...
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... N NOTE © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Preliminary c DS41236D-page 89 ...
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... PIC12F508/509/16F505 N NOTE DS41236D-page φ Preliminary α c β © 2007 Microchip Technology Inc. ...
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... Microchip Technology Inc. PIC12F508/509/16F505 Preliminary DS41236D-page 91 ...
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... PIC12F508/509/16F505 D N NOTE DS41236D-page Preliminary φ L © 2007 Microchip Technology Inc. ...
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... D N NOTE TOP VIEW A3 © 2007 Microchip Technology Inc. PIC12F508/509/16F505 EXPOSED PAD BOTTOM VIEW A NOTE 2 A1 Preliminary NOTE DS41236D-page 93 ...
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... PIC12F508/509/16F505 N NOTE DS41236D-page Preliminary © 2007 Microchip Technology Inc. ...
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... N NOTE © 2007 Microchip Technology Inc. PIC12F508/509/16F505 φ Preliminary h α c β DS41236D-page 95 ...
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... PIC12F508/509/16F505 D N NOTE DS41236D-page Preliminary © 2007 Microchip Technology Inc. φ L ...
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... Tables 10-1 (Industrial), 10-2 (Extended), and Tables 10-1 (Industrial, Extended) and 10-2 (Pull-up Resistor Ranges), 10-3, 10-4 and 10-6; Revised Figure 10-1, Figure 10-2; Section 11.0, Added Char data; Revised Package Marking Information; Revised Product ID System. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 Preliminary DS41236D-page 97 ...
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... PIC12F508/509/16F505 NOTES: DS41236D-page 98 Preliminary © 2007 Microchip Technology Inc. ...
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... PORTB ............................................................................... 29 Power-down Mode.............................................................. 53 Prescaler ............................................................................ 36 Program Counter ................................................................ cycles .............................................................................. Oscillator....................................................................... 43 Reader Response............................................................. 102 Read-Modify-Write.............................................................. 31 Register File Map PIC12F508 ................................................................. 17 PIC12F509 ................................................................. 17 PIC16F505 ................................................................. 17 Registers Special Function ......................................................... 18 Reset .................................................................................. 39 Reset on Brown-Out ........................................................... 52 S Sleep ............................................................................ 39, 53 Software Simulator (MPLAB SIM) ...................................... 64 Special Features of the CPU .............................................. 39 Special Function Registers ................................................. 18 Stack................................................................................... 25 Status Register ............................................................... 9, 20 ...
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... PIC12F508/509/16F505 W Wake-up from Sleep ........................................................... 53 Watchdog Timer (WDT) ................................................ 39, 50 Period.......................................................................... 50 Programming Considerations ..................................... 50 WWW Address.................................................................. 101 WWW, On-Line Support........................................................ 3 Z Zero bit .................................................................................. 9 DS41236D-page 100 Preliminary © 2007 Microchip Technology Inc. ...
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... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2007 Microchip Technology Inc. PIC12F508/509/16F505 CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • ...
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... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS41236D-page 102 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS41236D Preliminary © 2007 Microchip Technology Inc. ...
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... QTP pattern #301 b) PIC12F508-I/SN = Industrial Temp., SOIC package c) PIC12F508T-E/P = Extended Temp., PDIP package, Tape and Reel (3, 4) (3, 4) (4) Note 1: (4) ( Preliminary . tape and reel SOIC and TSSOP packages only tape and reel SOIC and MSOP packages only. PIC12F508/PIC12F509 only. Pb-free. DS41236D-page 103 ...
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... Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Preliminary © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...