PIC12F519-I/MC Microchip Technology, PIC12F519-I/MC Datasheet

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PIC12F519-I/MC

Manufacturer Part Number
PIC12F519-I/MC
Description
IC PIC MCU FLASH 1KX12 8DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr

Specifications of PIC12F519-I/MC

Core Size
8-Bit
Program Memory Size
1.5KB (1K x 12)
Core Processor
PIC
Speed
8MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
FLASH
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
64Byte
Ram Memory Size
41Byte
Cpu Speed
8MHz
No. Of Timers
1
Package
8DFN EP
Device Core
PIC
Family Name
PIC12
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
6
Interface Type
USB
Number Of Timers
1
Processor Series
PIC12F
Core
PIC
Data Ram Size
41 B
Maximum Clock Frequency
8 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164334 - MODULE SOCKET FOR 8L 2X3MM DFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFN
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12F519-I/MC
Manufacturer:
SST
Quantity:
101
This document includes the
programming specifications for the
following devices:
• PIC12F519
1.0
The PIC12F519 is programmed using a serial method.
The Serial mode will allow the PIC12F519 to be pro-
grammed while in the user’s system. This allows for
increased
specification applies to the PIC12F519 devices in all
packages.
FIGURE 1-1:
FIGURE 1-2:
TABLE 1-1:
© 2007 Microchip Technology Inc.
RB1
RB0
MCLR/V
V
V
Legend: I = Input, O = Output, P = Power
Note 1:
DD
SS
Pin Name
PROGRAMMING THE
PIC12F519
PP
In the PIC12F519, the programming high voltage is internally generated. To activate the Program/Verify
mode, high voltage of I
/RB3
PIC12F519 Memory Programming Specification
design
PIN DESCRIPTIONS DURING PROGRAMMING
Program/Verify mode
RB5/OSC1/CLKIN
flexibility.
PIC12F519 8-PIN 2X3 DFN DIAGRAM
PIC12F519 8-PIN PDIP, SOIC, AND MSOP DIAGRAM
RB3/MCLR/V
Function
ICSPCLK
ICSPDAT
RB5/OSC1/CLKIN
V
RB4/OSC2
V
DD
SS
RB3/MCLR/V
This
IHH
RB4/OSC2
V
DD
PP
current capability (see Table 6-1) needs to be applied to the MCLR input.
programming
V
DD
PP
Pin Type
P
I/O
1
2
3
4
P
P
I
(1)
1
2
3
4
During Programming
1.1
The PIC12F519 requires one power supply for V
(5.0V) and one for V
1.2
The Program/Verify mode for the PIC12F519 allows
programming of user program memory, user ID loca-
tions, backup OSCCAL location and the Configuration
Word.
8
7
6
5
Clock input – Schmitt Trigger input
Data input/output – Schmitt Trigger input
Programming Power
Power Supply
Ground
8
7
6
5
PIC12F519
Hardware Requirements
Program/Verify Mode
V
RB0/ICSPDAT
RB1/ICSPCLK
RB2/T0CKI
SS
Vss
RB0/ICSPDAT
RB1/ICSPCLK
RB2/T0CKI
Pin Description
PP
(12.5V).
DS41316B-page 1
DD

Related parts for PIC12F519-I/MC

PIC12F519-I/MC Summary of contents

Page 1

... Legend Input Output Power Note 1: In the PIC12F519, the programming high voltage is internally generated. To activate the Program/Verify mode, high voltage of I IHH © 2007 Microchip Technology Inc. PIC12F519 1.1 Hardware Requirements The PIC12F519 requires one power supply for V (5.0V) and one for V 1 ...

Page 2

... PIC12F519 2.0 MEMORY MAPPING The Program Memory map of the PIC12F519 device is shown in Figure 2-1. In Program/Verify mode, the Program Memory extends from 0x000 to 0x7FF. FIGURE 2-1: MEMORY MAP On-chip User Program Memory (Page 0) On-chip User Program Memory (Page 1) Reset Vector Flash Data Memory ...

Page 3

... Because this is a 12-bit core, the two MSbs of the data word are ignored. The commands that are available are described in Table 3-1. Mapping Hex (MSb ... LSb) Value start_bit, data (14), stop_bit start_bit, data (14), stop_bit PIC12F519 Data DS41316B-page 3 ...

Page 4

... PIC12F519 3.1.2.1 Load Data After receiving this command, the device will clock in 14 bits as a “data word” when 16 cycles are applied, as described previously. Because this is a 12-bit core, the FIGURE 3-2: LOAD DATA COMMAND (PROGRAM/VERIFY RB1 (ICSPCLK) RB0 (ICSPDAT) T SET T 3 ...

Page 5

... T 1 SET HLD 100 ns min. the appropriate memory (User Program Memory, Flash Data Memory or Test Program Memory) will begin after this command is received and decoded SET HLD 100 ns min. PIC12F519 T 2 DLY Next Command 1 µs min PROG Next Command 1 2 DS41316B-page 5 ...

Page 6

... PIC12F519 3.1.2.5 End Programming After receiving this command, the chip stops programming the memory (User Program Memory, Flash Data Memory or Test Program Memory) it was programming at the time. FIGURE 3-6: END PROGRAMMING COMMAND V IHH MCLR RB1 (ICSPCLK) RB0 0 (ICSPDAT) Reset 3.1.2.6 Bulk Erase Program Memory After this command is performed, the specific section of Program Memory and Configuration Word is erased ...

Page 7

... Note: Yes = erase No = unchanged © 2007 Microchip Technology Inc. User Program Flash Data Memory Memory Erased Erased Yes CPDF = 0 – Yes CPDF = 1 – No Yes CPDF = 0 – Yes CPDF = 1 – CPDF = 0 – No CPDF = 1 – Yes No No PIC12F519 User ID Memory Erased Yes DS41316B-page 7 ...

Page 8

... PIC12F519 FIGURE 3-8: READING AND TEMPORARY SAVING OF THE OSCCAL CALIBRATION BITS Increment Address Increment Address DS41316B-page 8 Start Enter Programming Mode 0x3FF? Yes Read Calibration Bits and Save in Computer/Programmer Temp. Memory 0x444? Yes Read Backup OSCCAL Calibration Bits and Save in Computer/Programmer Temp. Memory ...

Page 9

... Yes Read Calibration Bits from Computer/Programmer Temp. Memory Write Calibration Bits back as the operand of a MOVLW instruction to 0x3FF 0x444? Yes Read Backup OSCCAL Calibration Bits from Computer/Programmer Temp. Memory Write Backup OSCCAL Bits back to 0x444 Exit Programming Mode Done PIC12F519 DS41316B-page 9 ...

Page 10

... PIC12F519 FIGURE 3-10: PROGRAM FLOWCHART – USER MEMORY Start Enter Programming Mode PC = 0x7FF (Config Word) Increment Address One Word Program Cycle Read Data from Program Memory Data Correct? Yes Increment No Address All Programming Command Locations Done? Exit Programming Mode Done DS41316B-page 10 ...

Page 11

... Increment No Address All Programming Command Locations Done? Exit Programming Mode Done © 2007 Microchip Technology Inc. Yes Report No Programming Failure Yes PIC12F519 PROGRAM CYCLE Load Data for Program Memory Begin Programming Command (Externally timed) Wait T PROG End Programming Wait T DIS DS41316B-page 11 ...

Page 12

... PIC12F519 FIGURE 3-12: PROGRAM FLOWCHART – CONFIGURATION MEMORY Start Enter Programming Mode PC = 0x7FF (Config Word) Load Data Command One-Word Programming Cycle (see Figure 3-10) Read Data Command Data Correct? Increment Address Command No Address = 0x440? Load Data Command One-Word Programming Cycle (see Figure 3-10) ...

Page 13

... PC = 0x7FF (Config. Word) Increment Address 0x400? Note 1: This operation requires that CPDF = 1. © 2007 Microchip Technology Inc. Bulk Erase Device Exit Programming Restore OSCCAL bits ) Yes PIC12F519 Wait T ERA Mode ( Figure 3-9 ) Done Bulk Erase Device Wait T ERA Exit Programming Mode ...

Page 14

... PIC12F519 FIGURE 3-15: PROGRAM FLOWCHART – ERASE USER ID Start Increment PC DS41316B-page 14 Read and save OSCCAL bits Figure 3 Enter Program/Verify mode PC = 0x7FF (Config. Word 0x440? (First User ID) Yes Bulk Erase Device Wait T ERA Exit Programming Mode Restore OSCCAL bits Figure 3 Done © 2007 Microchip Technology Inc. ...

Page 15

... PROGRAM FLOWCHART – HIGH-LEVEL FULL DEVICE PROGRAM © 2007 Microchip Technology Inc. Start Read OSCCAL bits Bulk Erase User Memory Bulk Erase Data Memory Bulk Erase ID/OSCCAL Program User Memory Program Data Memory Program Configuration Memory Restore OSCCAL bits Done PIC12F519 DS41316B-page 15 ...

Page 16

... PIC12F519 FIGURE 3-17: PROGRAM FLOWCHART – HIGH-LEVEL FULL DEVICE ERASE DS41316B-page 16 Start Read OSCCAL bits Bulk Erase User Memory Bulk Erase Data Memory Bulk Erase ID/OSCCAL Restore OSCCAL bits Done © 2007 Microchip Technology Inc. ...

Page 17

... Note the responsibility of the application designer to ensure the use of the 1 ms DRT will result in acceptable operation. Refer to Electrical Specifications for V © 2007 Microchip Technology Inc. See REGISTER 4-1 below for details. bits can be — CPDF IOSCFS MCLRE DD (1) (1) rise time and stability requirements for this mode of operation. DD PIC12F519 CP WDTE FOSC1 FOSC0 bit 0 DS41316B-page 17 ...

Page 18

... Any Carry bits exceeding 16 bits are neglected. Finally, the Configuration Word (appropriately masked) is added to the checksum. The checksum computation for the PIC12F519 is shown in Table 5-1. Memory The checksum is calculated by summing the following: • The contents of all program memory locations • ...

Page 19

... PIC12F519 Max. Units Conditions 13 1 μs 1.0 V 0.15 5.5 V 13.5 V 1.8 mA 1.8 mA 0.4 mA μs 2000 μs — ...

Page 20

... PIC12F519 NOTES: DS41316B-page 20 © 2007 Microchip Technology Inc. ...

Page 21

... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 22

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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