PIC12F629-I/P Microchip Technology, PIC12F629-I/P Datasheet - Page 22

• Manufacturer Part Number: PIC12F629-I/P
• Description: IC MCU CMOS FLASH-BASE 8BIT 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F629-I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 128 B
• Height: 3.3 mm
• Length: 9.27 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM163029 - BOARD PICDEM FOR MECHATRONICSAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC12F629/675
REGISTER 3-2:
REGISTER 3-3:
DS41190C-page 20
bit 7-6:
bit 5-0:
bit 7-6
bit 5-4
bit 3
bit 2-0
TRISIO — GPIO TRISTATE REGISTER (ADDRESS: 85h)
WPU — WEAK PULL-UP REGISTER (ADDRESS: 95h)
bit 7
Unimplemented: Read as ’0’
TRISIO<5:0>: General Purpose I/O Tri-State Control bit
1 = GPIO pin configured as an input (tri-stated)
0 = GPIO pin configured as an output.
Unimplemented: Read as ‘0’
WPU<5:4>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
WPU<2:0>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Note 1: Global GPPU must be enabled for individual pull-ups to be enabled.
bit 7
Legend:
R = Readable bit
- n = Value at POR
Legend:
R = Readable bit
- n = Value at POR
Note:
U-0
U-0
—
—
2: The weak pull-up device is automatically disabled if the pin is in Output mode
(TRISIO = 0).
TRISIO<3> always reads 1.
U-0
U-0
—
—
TRISIO5
R/W-x
WPU5
R/W-1
W = Writable bit
’1’ = Bit is set
W = Writable bit
’1’ = Bit is set
TRISIO4
R/W-x
WPU4
R/W-1
TRISIO3
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-0
—
R-1
R/W-1
WPU2
TRISIO2 TRISIO1
R/W-x
 2003 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-1
WPU1
R/W-x
TRISIO0
WPU0
R/W-1
R/W-x
bit 0
bit 0