PIC16F716-I/SO Microchip Technology, PIC16F716-I/SO Datasheet - Page 70

IC PIC MCU FLASH 2KX14 18SOIC

PIC16F716-I/SO

Manufacturer Part Number
PIC16F716-I/SO
Description
IC PIC MCU FLASH 2KX14 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F716-I/SO

Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
18-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 8-bit
Package
18SOIC W
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILI3-DB16F716 - BOARD DAUGHTER ICEPIC3AC162054 - HEADER INTERFACE ICD2 16F716AC164010 - MODULE SKT PROMATEII DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC16F716
9.12
The Watchdog Timer is a free running, on-chip, RC
oscillator which does not require any external
components. This RC oscillator is separate from the
RC oscillator of the OSC1/CLKIN pin. That means that
the WDT will run, even if the clock on the OSC1/CLKIN
and OSC2/CLKOUT pins of the device have been
stopped, for example, by execution of a SLEEP instruc-
tion.
During normal operation, a WDT time-out generates a
device Reset (Watchdog Timer Reset). If the device is
in Sleep mode, a WDT time-out causes the device to
wake-up and continue with normal operation (Watch-
dog Timer Wake-up). The TO bit in the Status register
will be cleared upon a Watchdog Timer time-out.
FIGURE 9-14:
FIGURE 9-15:
DS41206A-page 68
2007h
81h
Legend:
Note 1:
Address
Note:
Watchdog Timer (WDT)
Shaded cells are not used by the Watchdog Timer.
See Register 9-1 for operation of these bits.
Config. bits
OPTION_REG
PSA and PS2:PS0 are bits in the OPTION_REG register.
Name
WATCHDOG TIMER BLOCK DIAGRAM
SUMMARY OF WATCHDOG TIMER REGISTERS
WDT Timer
Enable Bit
WDT
Bits 13:8
N/A
From TMR0 Clock Source (Figure 4-2)
(1)
BORV
RBPU
Bit 7
(1)
0
1
PSA
M
U
X
Preliminary
BOREN
INTEDG
Bit 6
(1)
The WDT can be permanently disabled by clearing
configuration bit WDTE (Section 9.1 “Configuration
Bits”).
WDT time-out period values may be found in the
Electrical Specifications section under T
ter #31). Values for the WDT prescaler (actually a
postscaler, but shared with the Timer0 prescaler) may
be assigned using the OPTION_REG register.
.
T0CS
Bit 5
0
Note:
Note:
Time-out
8 - to - 1 MUX
MUX
WDT
Postscaler
T0SE
Bit 4
1
The CLRWDT and SLEEP instructions clear
the WDT and the postscaler, if assigned to
the WDT, and prevent it from timing out
and generating a device Reset condition.
When a CLRWDT instruction is executed
and the prescaler is assigned to the WDT,
the prescaler count will be cleared, but the
prescaler assignment is not changed.
8
PWRTE
Bit 3
PSA
PSA
To TMR0 (Figure 4-2)
(1)
 2003 Microchip Technology Inc.
PS2:PS0
WDTE
Bit 2
PS2
FOSC1
Bit 1
PS1
WDT
(parame-
FOSC0
Bit 0
PS0

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