PIC16F636-I/SL Microchip Technology, PIC16F636-I/SL Datasheet - Page 49

• Manufacturer Part Number: PIC16F636-I/SL
• Description: IC PIC MCU FLASH 2KX14 14-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F636-I/SL

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LVD, POR, WDT
• Number Of I /o: 11
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232, SPI, USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Data Rom Size: 256 B
• Height: 1.25 mm
• Length: 8.65 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 3.9 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162057 - MPLAB ICD 2 HEADER 14DIP
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.2.4.5
Figure 4-5 shows the diagram for this pin. The RA4 pin
is configurable to function as one of the following:
• a general purpose I/O
• a TMR1 gate input
• a crystal/resonator connection
• a clock output
FIGURE 4-5:
© 2005 Microchip Technology Inc.
Data Bus
WPUDA
WPUDA
PORTA
PORTA
TRISA
TRISA
WDA
WDA
IOCA
IOCA
WR
WR
WR
WR
WR
Note 1:
RD
RD
RD
RD
RD
Interrupt-on-
change
2:
D
D
D
D
D
T1G To Timer1
CK
CK
CK
CK
CK
Oscillator modes are XT, HS, LP, LPTMR1 and
CLKOUT Enable.
With CLKOUT option.
RA4/T1G/OSC2/CLKOUT
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
BLOCK DIAGRAM OF RA4
OSC1
Fosc/4
RAPU
INTOSC/
RC/EC
CLKOUT
CLKOUT
Enable
CLK
Enable
RD PORTA
CLKOUT
Enable
Oscillator
XTAL
(1)
Circuit
Q
Q
1
0
(2)
Modes
EN
EN
D
D
V
V
Q3
V
DD
SS
V
DD
SS
Weak
Weak
I/O pin
PIC12F635/PIC16F636/639
Preliminary
4.2.4.6
Figure 4-6 shows the diagram for this pin. The RA5 pin
is configurable to function as one of the following:
• a general purpose I/O
• a TMR1 clock input
• a crystal/resonator connection
• a clock input
FIGURE 4-6:
Data Bus
WPUDA
WPUDA
PORTA
PORTA
TRISA
TRISA
WDA
WDA
IOCA
IOCA
WR
WR
WR
WR
RD
RD
RD
WR
Interrupt-on-
RD
RD
change
Note 1:
D
D
D
D
D
2:
T1G To Timer1
CK
CK
CK
CK
CK
RA5/T1CKI/OSC1/CLKIN
Oscillator modes are XT, HS, LP and LPTMR1.
When using Timer1 with LP oscillator, the
Schmitt Trigger is bypassed.
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
BLOCK DIAGRAM OF RA5
OSC2
RAPU
CLK
INTOSC
RD PORTA
Mode
Oscillator
Circuit
(1)
Q
Q
Modes
EN
EN
DS41232B-page 47
D
D
V
V
Q3
DD
SS
V
V
DD
SS
Weak
Weak
I/O pin
(2)