PIC16F688-I/SL Microchip Technology, PIC16F688-I/SL Datasheet - Page 4

• Manufacturer Part Number: PIC16F688-I/SL
• Description: IC PIC MCU FLASH 4KX14 14SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-I/SL

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 1
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT14SO-1 - SOCKET TRANSITION 14SOIC 150/208AC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F688
REVISION HISTORY
Rev A Document (02/2004)
Original errata document.
Module 1: “Auto-baud timer overflow does not generate
interrupt”.
Module 2: “EUSART – False Interrupt When ABDEN
Cleared”. A false interrupt is generated when an
EUSART auto-baud operation is terminated early by
clearing ABDEN.
Module 3: “EUSART – WUE Bit Not Clearing”. UE bit is
not clearing itself after a Break character, if RCREG is
read while RXDA is low and WUE is set.
Module 4: “EUSART – Writing to TXREG Overwrites
Values (Synchronous Mode Only)”. Writing to TXREG
faster than the baud rate in Synchronous mode over-
writes previous values.
Module 5: “EUSART – WUE/ABDEN Set to Wake-up
Creates an Extra Interrupt”. Setting WUE and auto-baud
enable to wake-up on a Break character, followed by a
Sync character, will generate an extra interrupt.
Module 6: “EUSART – Auto-Baud After Break Captures
Incorrect Baud Rates”. When using WUE and Auto-
Baud Detect simultaneously, the auto-baud will start
early. This will detect incorrect baud rate.
Rev B Document (08/2004)
Module 7: “EUSART – TX Pin Tri-states When TXEN is
Clear”. When TXEN is clear, the TX pin will be tri-stated.
Note that the TXEN bit is cleared after an auto-baud over-
flow condition.
Module 8: “EUSART – TX Pin Tri-states After Auto-
baud”. The TX pin will briefly tri-state for approximately 8
bit times after an auto-baud completes.
Module 9: “EUSART – Auto-Baud Always Completes
After 5 Edges on RC Pin”. The EUSART auto-baud fea-
ture requires 5 edges on the RC pin to complete the auto-
baud process.
Module 10: “Resets (when WDT times out)”. When
OPTION_REG bits, PS<2:0>, are clear, multiple spuri-
ous Resets can occur when the WDT times out.
Rev C Document (11/2004)
Module 11: “Data EEPROM Memory” for the
PIC16F688 silicon. The EEIF flag may be cleared
inadvertently when performing operations on the PIR1
register simultaneously with the completion of an
EEPROM write.
Module 12: EUSART – When BRG16 and BRGH are
both set, the first edge of the received Start bit is not
measured accurately.
Rev D Document (7/2005)
Added Data Sheet Clarifications/Corrections Section:
Added Module 1: New 4x4 QFN Package added.
DS80181G-page 4
Rev E Document (7/2006)
Data
Removed Items 1, which has been incorporated into
the data sheet.
Rev F Document (10/2006)
Added Module 13: “EUSART – Transmitter not Reset
When Enabled”.
Rev G Document (9/2008)
Updated Silicon Revision History to clarify on Items 4
and 13. Revised Modules: 2, 7-12.
Sheet
Clarifications/Corrections
© 2008 Microchip Technology Inc.
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