PIC12CE519-04I/P Microchip Technology, PIC12CE519-04I/P Datasheet - Page 210
PIC12CE519-04I/P
Manufacturer Part Number
PIC12CE519-04I/P
Description
IC MCU OTP 1KX12 W/EE 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12C508A-04SM.pdf
(113 pages)
3.PIC12C508A-04SM.pdf
(4 pages)
4.PIC12CE518-04SM.pdf
(16 pages)
Specifications of PIC12CE519-04I/P
Core Size
8-Bit
Program Memory Size
1.5KB (1K x 12)
Oscillator Type
Internal
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
16Byte
Ram Memory Size
41Byte
Cpu Speed
4MHz
No.
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGDVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12CE519-04I/P
Manufacturer:
Microchip
Quantity:
126
- PIC16F688T-ISL PDF datasheet
- PIC12C508A-04SM PDF datasheet #2
- PIC12C508A-04SM PDF datasheet #3
- PIC12CE518-04SM PDF datasheet #4
- Current page: 210 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
14.5
DS31014A-page 14-8
PWM Mode
In Pulse Width Modulation (PWM) mode, the CCPx pin produces up to a 10-bit resolution PWM
output. Since the CCPx pin is multiplexed with the PORT data latch, the corresponding TRIS bit
must be cleared to make the CCPx pin an output.
Figure 14-3
For a step by step procedure on how to set up the CCP module for PWM operation, see Subsec-
tion
Figure 14-3: Simplified PWM Block Diagram
A PWM output
cycle). The frequency of the PWM is the inverse of the period (1/period).
Figure 14-4: PWM Output
Note:
14.5.3 “Set-up for PWM Operation.”
Note 1:
Timer2 Module
CCP Module
Clearing the CCPxCON register will force the CCPx PWM output latch to the default
low level. This is not the port I/O data latch.
shows a simplified block diagram of the CCP module in PWM mode.
(Figure
8-bit timer is concatenated with 2-bit internal Q clock or 2 bits of the prescaler to
create 10-bit time-base.
CCPRxH (Slave)
(DCxB9:DCxB2)
Comparator
CCPRxL
14-4) has a time-base (period) and a time that the output stays high (duty
Duty cycle registers
PR2
TMR2
Comparator
8
8
10
TMR2 = PR2 + 1, TMR2 forced to 0h
10
10
Duty Cycle =
DCxB9:DCxB0
(Note 1)
Period = PR2 + 1
Clear Timer, CCPx pin
and latch the Duty Cycle
TMR2 = Duty Cycle
CCPxCON<5:4>
(DCxB1:DCxB0)
TMR2 = PR2 + 1, TMR2 forced to 0h
R
S
Q
TRIS<y>
1997 Microchip Technology Inc.
CCPx
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