PIC12CE519-04I/SM Microchip Technology, PIC12CE519-04I/SM Datasheet - Page 307

• Manufacturer Part Number: PIC12CE519-04I/SM
• Description: IC MCU OTP 1KX12 W/EE 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12CE519-04I/SM

• Core Size: 8-Bit
• Program Memory Size: 1.5KB (1K x 12)
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: OTP
• Eeprom Size: 16 x 8
• Ram Size: 41 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 16Byte
• Ram Memory Size: 41Byte
• Cpu Speed: 4MHz
• No. Of Timers: 1
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 41 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

17.4.8
1997 Microchip Technology Inc.
Baud Rate Generator
In I
register
stops until another reload has taken place. In I
cally. If Clock Arbitration is taking place for instance, the BRG will be reloaded when the SCL pin
is sampled high
Figure 17-18: Baud Rate Generator Block Diagram
Figure 17-19: Baud Rate Generator Timing With Clock Arbitration
2
SDA
SCL
BRG
value
BRG
reload
C master mode, the reload value for the BRG is located in the lower 7 bits of the SSPADD
(Figure
SSPM3:SSPM0
17-18). When the BRG is loaded with this value, the BRG counts down to 0 and
(Figure
BRG counts
down
03h
SCL
17-19).
DX
SCL de-asserted but slave holds
SCL low (clock arbitration)
SSPM3:SSPM0
Preliminary
02h
SCL is sampled high, reload takes
place, and BRG starts its count.
BRG counts
down
Reload
Control
CLKOUT
01h
2
C master mode, the BRG is reloaded automati-
Reload
Section 17. MSSP
BRG counts
down
00h (hold off)
BRG Down Counter
DX-1
SSPADD<6:0>
SCL allowed to transition high
03h
DS31017A-page 17-31
Fosc/4
02h
17