PIC18LF13K50-I/SS Microchip Technology, PIC18LF13K50-I/SS Datasheet - Page 182

IC PIC MCU FLASH 8K 1.8V 20-SSOP

PIC18LF13K50-I/SS

Manufacturer Part Number
PIC18LF13K50-I/SS
Description
IC PIC MCU FLASH 8K 1.8V 20-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18LF13K50-I/SS

Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Controller Family/series
PIC18
No. Of I/o's
15
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
48MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART, I2C, MSSP, SPI, USB
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
18
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC18F/LF1XK50
FIGURE 16-2:
The operation of the EUSART module is controlled
through three registers:
• Transmit Status and Control (TXSTA)
• Receive Status and Control (RCSTA)
• Baud Rate Control (BAUDCTL)
These
Register 16-2
For all modes of EUSART operation, the TRIS control
bits corresponding to the RX/DT and TX/CK pins should
be set to ‘1’. The EUSART control will automatically
reconfigure the pin from input to output, as needed.
DS41350E-page 182
BRG16
Baud Rate Generator
SPBRGH
registers
and
SPBRG
Register
RX/DT pin
are
+ 1
EUSART RECEIVE BLOCK DIAGRAM
detailed
16-3, respectively.
Multiplier
BRG16
SYNC
BRGH
Pin Buffer
and Control
in
SPEN
1 X 0 0
X 1 1 0
X 1 0 1
x4
Register
x16 x64
F
OSC
0
0
0
16-1,
Preliminary
n
Data
Recovery
÷ n
FERR
Stop
MSb
CREN
(8)
RX9D
7
RX9
RSR Register
 2010 Microchip Technology Inc.
RCREG Register
• • •
OERR
8
1
RCIF
RCIE
Data Bus
0
START
LSb
RCIDL
Interrupt
FIFO

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