PIC16F884-I/PT Microchip Technology, PIC16F884-I/PT Datasheet - Page 6

IC PIC MCU FLASH 4KX14 44TQFP

PIC16F884-I/PT

Manufacturer Part Number
PIC16F884-I/PT
Description
IC PIC MCU FLASH 4KX14 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F884-I/PT

Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
MSSP/EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164120-2
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Package
44TQFP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC16F884-I/PT
0
PIC16F88X
5. Module: MSSP (I
DS80302F-page 6
When the master device wants to terminate
receiving any more data from the slave device, it
will do so by sending a NACK in response to the
last data byte received from the slave. When the
slave receives the NACK, the R/W bit of the
SSPSTAT register remains set improperly.
Work around
Use the CKP bit of the SSPCON register to
determine when the master has responded with a
NACK. The CKP bit will be clear when the
response is an ACK, and set when the response is
a NACK. The CKP bit is automatically cleared to
stretch the clock when the master responds to
received data with an ACK. This gives the slave
time to load the SSPBUF register before setting
the CKP bit to release the clock stretching. When
the master responds to received data with a NACK
the CKP bit properly remains set, and there is no
clock stretching.
Affected Silicon Revisions
PIC16F882
PIC16F883/PIC16F884
PIC16F886/PIC16F887
A0
A0
A2
X
X
X
2
C™ Slave Mode)
© 2009 Microchip Technology Inc.

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