PIC16F884-I/PT Microchip Technology, PIC16F884-I/PT Datasheet - Page 215
PIC16F884-I/PT
Manufacturer Part Number
PIC16F884-I/PT
Description
IC PIC MCU FLASH 4KX14 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.MCP1631RD-MCC2.pdf
(328 pages)
3.PIC16F882-ISS.pdf
(16 pages)
4.PIC16F882-ISS.pdf
(36 pages)
5.PIC16F883-ISO.pdf
(288 pages)
Specifications of PIC16F884-I/PT
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
MSSP/EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
35
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164120-2
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Package
44TQFP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F884-I/PT
Manufacturer:
VISHAY
Quantity:
2 300
Company:
Part Number:
PIC16F884-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16F884-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
TABLE 14-4:
© 2007 Microchip Technology Inc.
W
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
CCPR2L
Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1:
Register
2:
3:
4:
5:
6:
If V
One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
See Table 14-5 for Reset value for specific condition.
If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
Accessible only when SSPCON register bits SSPM<3:0> = 1001.
DD
10Ah/18Ah
10Bh/18Bh
100h/180h
102h/182h
103h/183h
104h/184h
INITIALIZATION CONDITION FOR REGISTER
goes too low, Power-on Reset will be activated and registers will be affected differently.
01h/101h
06h/106h
0Ah/8Ah/
0Bh/8Bh/
Address
00h/80h/
02h/82h/
03h/83h/
04h/84h/
0Ch
0Dh
0Eh
0Fh
1Ah
1Bh
05h
07h
08h
09h
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
—
xxxx xxxx
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- xxxx
---0 0000
0000 000x
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
-000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 000x
0000 0000
0000 0000
xxxx xxxx
Power-on
Reset
PIC16F882/883/884/886/887
Preliminary
Brown-out Reset
MCLR Reset
uuuu uuuu
uuuu uuuu
0000 0000
000q quuu
uuuu uuuu
0000 0000
0000 0000
0000 0000
0000 0000
---- 0000
---0 0000
0000 000u
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
0000 0000
-000 0000
uuuu uuuu
0000 0000
uuuu uuuu
uuuu uuuu
0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
WDT Reset
xxxx xxxx
(4)
(1)
Wake-up from Sleep through
Wake-up from Sleep through
WDT Time-out
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuq quuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
Interrupt
PC + 1
DS41291D-page 213
(3)
(4)
(2)
(2)
(2)