ATMEGA48V-10AU Atmel, ATMEGA48V-10AU Datasheet - Page 181
ATMEGA48V-10AU
Manufacturer Part Number
ATMEGA48V-10AU
Description
IC AVR MCU 4K 10MHZ 1.8V 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATAVRTS2080B.pdf
(378 pages)
2.ATMEGA48-20AU.pdf
(35 pages)
3.ATMEGA88-20MU.pdf
(33 pages)
Specifications of ATMEGA48V-10AU
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA48x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire/SPI/USART/Serial
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
23
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
32-pin TQFP
Programmable Memory
4K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA48V-10AU
Manufacturer:
ATM
Quantity:
10 000
Company:
Part Number:
ATMEGA48V-10AU
Manufacturer:
MOT
Quantity:
53
Part Number:
ATMEGA48V-10AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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19.7.2
2545S–AVR–07/10
Receiving Frames with 9 Data Bits
The following code example shows a simple USART receive function based on polling of the
Receive Complete (RXCn) Flag. When using frames with less than eight bits the most significant
bits of the data read from the UDRn will be masked to zero. The USART has to be initialized
before the function can be used.
Note:
The function simply waits for data to be present in the receive buffer by checking the RXCn Flag,
before reading the buffer and returning the value.
If 9-bit characters are used (UCSZn=7) the ninth bit must be read from the RXB8n bit in
UCSRnB before reading the low bits from the UDRn. This rule applies to the FEn, DORn and
UPEn Status Flags as well. Read status from UCSRnA, then data from UDRn. Reading the
UDRn I/O location will change the state of the receive buffer FIFO and consequently the TXB8n,
FEn, DORn and UPEn bits, which all are stored in the FIFO, will change.
The following code example shows a simple USART receive function that handles both nine bit
characters and the status bits.
Assembly Code Example
C Code Example
USART_Receive:
unsigned char USART_Receive( void )
{
}
; Wait for data to be received
sbis UCSRnA, RXCn
rjmp USART_Receive
; Get and return received data from buffer
in
ret
/* Wait for data to be received */
while ( !(UCSRnA & (1<<RXCn)) )
/* Get and return received data from buffer */
return UDRn;
1.
See ”About Code Examples” on page 7.
r16, UDRn
;
(1)
(1)
ATmega48/88/168
181
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