PIC18F13K50-I/SO Microchip Technology, PIC18F13K50-I/SO Datasheet - Page 134

IC PIC MCU FLASH 8K 1.8V 20-SOIC

PIC18F13K50-I/SO

Manufacturer Part Number
PIC18F13K50-I/SO
Description
IC PIC MCU FLASH 8K 1.8V 20-SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F13K50-I/SO

Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
15
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
48MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART, I2C, MSSP, SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM164127, DV164126
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
20SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164126 - KIT DEVELOPMENT USB W/PICKIT 2DM164127 - KIT DEVELOPMENT USB 18F14/13K50AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPXLT20SO1-1 - SOCKET TRANS ICE 20DIP TO 20SOICAC164307 - MODULE SKT FOR PM3 28SSOP
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F13K50-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F/LF1XK50
14.4.7
In Single Output mode, pulse steering allows any of the
PWM pins to be the modulated signal. Additionally, the
same PWM signal can be simultaneously available on
multiple pins.
Once
(CCP1M<3:2> = 11
CCP1CON register), the user firmware can bring out
the same PWM signal to one, two, three or four output
pins by setting the appropriate STR<D:A> bits of the
PSTRCON register, as shown in
REGISTER 14-4:
DS41350E-page 134
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
the
The PWM Steering mode is available only when the CCP1CON register bits CCP1M<3:2> = 11 and
P1M<1:0> = 00.
PULSE STEERING MODE
Single
Unimplemented: Read as ‘0’
STRSYNC: Steering Sync bit
1 = Output steering update occurs on next PWM period
0 = Output steering update occurs at the beginning of the instruction cycle boundary
STRD: Steering Enable bit D
1 = P1D pin has the PWM waveform with polarity control from CCP1M<1:0>
0 = P1D pin is assigned to port pin
STRC: Steering Enable bit C
1 = P1C pin has the PWM waveform with polarity control from CCP1M<1:0>
0 = P1C pin is assigned to port pin
STRB: Steering Enable bit B
1 = P1B pin has the PWM waveform with polarity control from CCP1M<1:0>
0 = P1B pin is assigned to port pin
STRA: Steering Enable bit A
1 = P1A pin has the PWM waveform with polarity control from CCP1M<1:0>
0 = P1A pin is assigned to port pin
U-0
and
PSTRCON: PULSE STEERING CONTROL REGISTER
Output
P1M<1:0> = 00
W = Writable bit
‘1’ = Bit is set
mode
Table
U-0
14-2.
is
selected
STRSYNC
of
R/W-0
Preliminary
the
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
STRD
While the PWM Steering mode is active, CCP1M<1:0>
bits of the CCP1CON register select the PWM output
polarity for the P1<D:A> pins.
The PWM auto-shutdown operation also applies to
PWM Steering mode as described in
“Enhanced
auto-shutdown event will only affect pins that have
PWM outputs enabled.
Note:
The associated TRIS bits must be set to
output (‘0’) to enable the pin output driver
in order to see the PWM signal on the pin.
PWM
R/W-0
STRC
(1)
Auto-shutdown
 2010 Microchip Technology Inc.
x = Bit is unknown
R/W-0
STRB
Section 14.4.4
mode”.
R/W-1
STRA
bit 0
An

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