PIC16LF727-I/P Microchip Technology, PIC16LF727-I/P Datasheet - Page 50
![IC PIC MCU FLASH 8K 1.8V 40-DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC16LF727-I/P
Manufacturer Part Number
PIC16LF727-I/P
Description
IC PIC MCU FLASH 8K 1.8V 40-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF727-I/P
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
36
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC16LF
No. Of I/o's
36
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
36
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 14 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF727-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC16F72X/PIC16LF72X
4.5.5
The PIR2 register contains the interrupt flag bits, as
shown in Register 4-5.
REGISTER 4-5:
TABLE 4-1:
DS41341E-page 50
INTCON
OPTION_REG
PIE1
PIE2
PIR1
PIR2
Legend:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-1
bit 0
Name
U-0
—
- = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Capture, Compare and PWM.
PIR2 REGISTER
TMR1GIE
TMR1GIF
RBPU
Bit 7
GIE
Unimplemented: Read as ‘0’
CCP2IF: CCP2 Interrupt Flag bit
Capture Mode:
Compare Mode:
PWM mode:
Unused in this mode
—
—
SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPTS
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
U-0
—
PIR2: PERIPHERAL INTERRUPT REQUEST REGISTER 2
INTEDG
PEIE
ADIE
ADIF
Bit 6
—
—
W = Writable bit
‘1’ = Bit is set
T0CS
U-0
RCIE
RCIF
Bit 5
T0IE
—
—
—
T0SE
Bit 4
INTE
TXIE
TXIF
—
—
U-0
—
SSPIE
SSPIF
RBIE
Bit 3
PSA
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
CCP1IE
CCP1IF
Note:
Bit 2
T0IF
PS2
—
—
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE of the INTCON register.
User
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
TMR2IE
TMR2IF
INTF
Bit 1
PS1
—
—
U-0
—
software
TMR1IE
CCP2IE
TMR1IF
CCP2IF
Bit 0
RBIF
© 2009 Microchip Technology Inc.
PS0
x = Bit is unknown
U-0
should
—
0000 000x
1111 1111
0000 0000
---- ---0
0000 0000
---- ---0
POR, BOR
Value on
ensure
CCP2IF
0000 000x
1111 1111
0000 0000
---- ---0
0000 0000
---- ---0
R/W-0
Value on
all other
Resets
bit 0
the
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