ATMEGA48-20PU Atmel, ATMEGA48-20PU Datasheet - Page 367

IC AVR MCU 4K 20MHZ 5V 28DIP

ATMEGA48-20PU

Manufacturer Part Number
ATMEGA48-20PU
Description
IC AVR MCU 4K 20MHZ 5V 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA48-20PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
ATMEGA48x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire/SPI/USART/Serial
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
512Byte
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
36.15 Rev. 2545F-05/05
36.16 Rev. 2545E-02/05
36.17 Rev. 2545D-07/04
2545T–AVR–05/11
11.
12.
13.
14.
15.
16.
17
18.
19.
20.
1.
2.
3.
4.
5.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
1.
2.
3.
Updated rev. A in
Added rev. C and D in
Table notes in
Updated instructions used with WDTCSR in relevant code examples.
Updated
Updated note in
Updated
Updated Features in
Updated
Updated
Added
Updated
Added
Update
Updated
Updated
MLF-package alternative changed to “Quad Flat No-Lead/Micro Lead Frame Package
QFN/MLF”.
Updated
Updated
Updated
Updated
and
Added
Updated
Updated
267.
Updated
Updated
Updated
Updated
page
Updated
and
Updated
Table 28-16 on page 300
Table 27-11 on page
361.
Table 29-1 on page
Section 3. “Resources” on page 8
“Pin change interrupt timing” on page 66
Section 9.6 “Calibrated internal RC oscillator” on page
“UCSRnA – USART MSPIM control and status register n A” on page
“Bit 6 – ACBG: Analog comparator bandgap select” on page
“Prescaling and conversion timing” on page
“Limitations of debugWIRE” on page
Figure 16-7 on page
Section 28.8.3 “Serial programming instruction set” on page
Section 35. “Errata” on page
“EECR – The EEPROM control register” on page
“Calibrated internal RC oscillator” on page
“External clock” on page
“8-bit timer/counter block diagram.” on page
“Enter programming mode” on page
“DC characteristics” on page
“Ordering information” on page
“System clock prescaler” on page
Table 29-3 on page
“Errata Atmel ATmega88” on page 360
Table 9-5 on page
“SPMCSR – Store program memory control and status register” on page
Section 29.2 “DC characteristics” on page 303
“Bit rate generator unit” on page
“Errata Atmel ATmega48” on page
“Analog-to-digital converter” on page
“Errata Atmel ATmega48” on page
283.
306.
31,
307,
122,
Table 29-4 on page
35.
Table 29-6 on page
Figure 30-45 on page
357.
303.
350.
36.
291.
261.
216.
and
33.
ATmega48/88/168
247.
357.
90.
307,
“Errata Atmel ATmega168” on
309,
339.
357.
244.
22.
Table 27-9 on page
Table 29-2 on page 306
updated.
33.
300.
242.
206.
282,
367

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