PIC18LF24J11-I/SO Microchip Technology, PIC18LF24J11-I/SO Datasheet - Page 372

IC PIC MCU FLASH 16K 2V 28-SOIC

PIC18LF24J11-I/SO

Manufacturer Part Number
PIC18LF24J11-I/SO
Description
IC PIC MCU FLASH 16K 2V 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18LF24J11-I/SO

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
16
Ram Memory Size
3776Byte
Cpu Speed
48MHz
No. Of Timers
5
No. Of Pwm
RoHS Compliant
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
31 KHz
Number Of Programmable I/os
16
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
A/d Bit Size
10 bit
A/d Channels Available
10
Height
2.31 mm
Length
17.87 mm
Supply Voltage (max)
2.75 V, 3.6 V
Supply Voltage (min)
2 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC18F46J11 FAMILY
23.6
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the LVDIF bit will be set and the device will wake-
up from Sleep. Device execution will continue from the
interrupt vector address if interrupts have been globally
enabled.
TABLE 23-1:
DS39932C-page 372
HLVDCON
INTCON
PIR2
PIE2
IPR2
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
Name
Operation During Sleep
VDIRMAG
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIF
OSCFIE
OSCFIP
Bit 7
REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
BGVST
CM1IF
CM1IE
CM1IP
Bit 6
CM2IE
CM2IP
IRVST
CM2IF
Bit 5
HLVDEN
INT0IE
Bit 4
HLVDL3
23.7
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
BCLIE
BCLIP
BCLIF
RBIE
Bit 3
Effects of a Reset
HLVDL2
TMR0IF
LVDIF
LVDIE
LVDIP
Bit 2
HLVDL1
TMR3IE
TMR3IP
TMR3IF
INT0IF
© 2009 Microchip Technology Inc.
Bit 1
HLVDL0
CCP2IF
CCP2IE
CCP2IP
RBIF
Bit 0
on page
Values
Reset
63
65
65
65
66

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