ATTINY461-20MU Atmel, ATTINY461-20MU Datasheet - Page 185

IC AVR MCU 4K 20MHZ 32-QFN

ATTINY461-20MU

Manufacturer Part Number
ATTINY461-20MU
Description
IC AVR MCU 4K 20MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY461-20MU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
2-Wire, SPI, USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIPATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY461-20MU
Manufacturer:
KODENSHI
Quantity:
991
Part Number:
ATTINY461-20MUR
Manufacturer:
ATMEL
Quantity:
5 560
18.7.12
18.7.13
2588E–AVR–08/10
Programming the Lock Bits
Reading the Fuse and Lock Bits
Figure 18-7. Programming the FUSES Waveforms
The algorithm for programming the Lock bits is as follows (refer to
page 180
The Lock bits can only be cleared by executing Chip Erase.
The algorithm for reading the Fuse and Lock bits is as follows (refer to
on page 180
RESET +12V
1. A: Load Command “0010 0000”.
2. C: Load Data Low Byte. Bit n = “0” programs the Lock bit. If LB mode 3 is programmed
3. Give WR a negative pulse and wait for RDY/BSY to go high.
1. A: Load Command “0000 0100”.
2. Set OE to “0”, BS2 to “0” and BS1 to “0”. The status of the Fuse Low bits can now be
3. Set OE to “0”, BS2 to “1” and BS1 to “1”. The status of the Fuse High bits can now be
4. Set OE to “0”, BS2 to “1”, and BS1 to “0”. The status of the Extended Fuse bits can now
5. Set OE to “0”, BS2 to “0” and BS1 to “1”. The status of the Lock bits can now be read at
6. Set OE to “1”.
PAGEL/BS1
RDY/BSY
XA1/BS2
XTAL1
DATA
(LB1 and LB2 is programmed), it is not possible to program the Boot Lock bits by any
External Programming mode.
read at DATA (“0” means programmed).
read at DATA (“0” means programmed).
be read at DATA (“0” means programmed).
DATA (“0” means programmed).
XA0
WR
OE
for details on Command and Data loading):
for details on Command loading):
0x40
A
DATA
C
Write Fuse Low byte
XX
0x40
A
DATA
C
Write Fuse high byte
XX
“Programming the Flash” on
0x40
A
“Programming the Flash”
DATA
C
Write Extended Fuse byte
XX
185

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