PIC16LF627-04/SO Microchip Technology, PIC16LF627-04/SO Datasheet - Page 113
PIC16LF627-04/SO
Manufacturer Part Number
PIC16LF627-04/SO
Description
IC MCU FLASH 1KX14 COMP 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC16F627-04P.pdf
(170 pages)
Specifications of PIC16LF627-04/SO
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
18-SOIC (7.5mm Width)
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
224 B
Interface Type
SCI, USART
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
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2003 Microchip Technology Inc.
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0 ≤ f ≤ 127
0 ≤ b < 7
skip if (f<b>) = 1
None
01
If bit 'b' in register 'f' is '1' then the
next instruction is skipped.
If bit 'b' is '1', then the next
instruction fetched during the
current instruction execution, is
discarded and a NOP is executed
instead, making this a two-cycle
instruction.
1
1
HERE
FALSE
TRUE
Before Instruction
After Instruction
if FLAG<1> = 1,
(2)
PC = address HERE
if FLAG<1> = 0,
PC =
PC =
11bb
BTFSS
GOTO
•
•
•
address FALSE
address TRUE
bfff
REG1
PROCESS_CODE
ffff
Preliminary
CALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
CLRF
Encoding:
Description:
Words:
Cycles:
Example
Status Affected:
Operands:
Operation:
Syntax:
Call Subroutine
[ label ] CALL k
0 ≤ k ≤ 2047
(PC)+ 1→ TOS,
k → PC<10:0>,
(PCLATH<4:3>) → PC<12:11>
None
10
Call Subroutine. First, return
address (PC+1) is pushed onto
the stack. The eleven bit
immediate address is loaded
into PC bits <10:0>. The upper
bits of the PC are loaded from
PCLATH. CALL is a two-cycle
instruction.
1
2
HERE
Before Instruction
After Instruction
Clear f
[ label ] CLRF
0 ≤ f ≤ 127
00h → (f)
1 → Z
Z
00
The contents of register 'f' are
cleared and the Z bit is set.
1
1
CLRF
Before Instruction
After Instruction
PIC16F62X
PC
PC
TOS = Address HERE+1
REG1
REG1
Z
0kkk
CALL
0001
REG1
= Address HERE
= Address THERE
DS40300C-page 111
= 0x5A
= 0x00
= 1
f
kkkk
THERE
1fff
kkkk
ffff
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