PIC24FJ16GA002-I/SS Microchip Technology, PIC24FJ16GA002-I/SS Datasheet - Page 24
![IC PIC MCU FLASH 16K 28-SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC24FJ16GA002-I/SS
Manufacturer Part Number
PIC24FJ16GA002-I/SS
Description
IC PIC MCU FLASH 16K 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
4.PIC24FJ64GA004-EPT.pdf
(262 pages)
Specifications of PIC24FJ16GA002-I/SS
Program Memory Type
FLASH
Program Memory Size
16KB (5.5K x 24)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, MA240013, AC164127, DM300027, DV164033, DM240002
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
4KB
Cpu Speed
32MHz
No. Of Timers
5
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Package
28SSOP
Device Core
PIC
Family Name
PIC24
Maximum Speed
32 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164338 - MOD SKT PIC24F/DSPIC33F 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ16GA002-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC24FJXXXGA0XX
3.9
The procedure for reading configuration memory is
similar to the procedure for reading code memory,
except that 16-bit data words are read (with the upper
byte read being all ‘0’s) instead of 24-bit words. Since
there are two Configuration registers, they are read one
register at a time.
TABLE 3-9:
DS39768D-page 24
Step 1: Exit Reset vector.
Step 2: Initialize TBLPAG, the Read Pointer (W6) and the Write Pointer (W7) for TBLRD instruction.
Step 3: Read the Configuration register and write it to the VISI register (located at 784h), and clock out the
Step 4: Repeat Step 3 again to read Configuration Word 1.
Step 5: Reset device internal PC.
Command
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
0000
Reading Configuration Words
VISI register using the REGOUT command.
SERIAL INSTRUCTION EXECUTION FOR READING ALL CONFIGURATION MEMORY
000000
040200
000000
200xx0
880190
2xxxx7
207847
000000
BA0BB6
000000
000000
<VISI>
000000
040200
000000
(Hex)
Data
NOP
GOTO
NOP
MOV
MOV
MOV
MOV
NOP
TBLRDL
NOP
NOP
Clock out contents of VISI register
NOP
GOTO
NOP
0x200
<CW2Address23:16>, W0
W0, TBLPAG
<CW2Address15:0>, W6
#VISI, W7
[W6++], [W7]
0x200
Table 3-9 shows the ICSP programming details for
reading the Configuration Words. Note that the
TBLPAG register must be loaded with 00h for 96 Kbyte
and below devices and 01h for 128 Kbyte devices (the
upper byte address of configuration memory), and the
Read Pointer, W6, is initialized to the lower 16 bits of
the Configuration Word location.
Description
© 2008 Microchip Technology Inc.