PIC24FJ16GA002-I/SO Microchip Technology, PIC24FJ16GA002-I/SO Datasheet - Page 4
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PIC24FJ16GA002-I/SO
Manufacturer Part Number
PIC24FJ16GA002-I/SO
Description
IC PIC MCU FLASH 16K 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
4.PIC24FJ64GA004-EPT.pdf
(262 pages)
Specifications of PIC24FJ16GA002-I/SO
Core Size
16-Bit
Program Memory Size
16KB (5.5K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
4KB
Cpu Speed
32MHz
No. Of Timers
5
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, MA240013, AC164127, DM300027, DV164033, DM240002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28SOIC W
Device Core
PIC
Family Name
PIC24
Maximum Speed
32 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164339 - MODULE SKT FOR PM3 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
Details
PIC24FJXXXGA0XX
Pin Diagrams
DS39768D-page 4
28-Pin PDIP, SSOP, SOIC
28-Pin QFN
Legend:
Note 1:
PGC1/EMUC1/AN3/C2IN+/RP1/CN5/RB1
PGD1/EMUD1/AN2/C2IN-/RP0/CN4/RB0
PGD3/EMUD3/RP5/SDA1/CN27/PMD7/RB5
PGC1/EMUC1/AN3/C2IN+/RP1/CN5/RB1
PGD1/EMUD1/AN2/C2IN-/RP0/CN4/RB0
RPx represents remappable peripheral pins.
The bottom pad of QFN packages should be connected to V
(1)
RB2
RB3
RA2
RA3
V
SS
MCLR
RA0
RA1
RB2
RB3
RA2
RA3
RB4
RA4
V
V
DD
SS
1
2
3
4
5
6
7
PIC24FJXXGA002
28
8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
27
9
10 11
26
25
12 13 14
24
28
27
26
25
24
23
22
21
20
19
18
17
16
15
23
22
21
20
19
18
17
16
15
V
V
RB15
RB14
RB13
RB12
PGC2/EMUC2/TMS/RP11/CN15/PMD1/RB11
PGD2/EMUD2/TDI/RP10/CN16/PMD2/RB10
V
DISVREG
RB9
RB8
RB7
PGC3/EMUC3/RP6/SCL1/CN24/PMD6/RB6
DD
SS
CAP
RB13
RB12
PGC2/EMUC2/TMS/RP11/CN15/PMD1/RB11
PGD2/EMUD2/TDI/RP10/CN16/PMD2/RB10
V
DISVREG
RB9
/V
CAP
DDCORE
SS
/V
.
DDCORE
© 2008 Microchip Technology Inc.