PIC16F913-I/SS Microchip Technology, PIC16F913-I/SS Datasheet - Page 226

IC PIC MCU FLASH 4KX14 28SSOP

PIC16F913-I/SS

Manufacturer Part Number
PIC16F913-I/SS
Description
IC PIC MCU FLASH 4KX14 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F913-I/SS

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC16F
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
Package
28SSOP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
24
Interface Type
I2C/SPI/USART
On-chip Adc
5-chx10-bit
Number Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Ram Size
352 B
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164307 - MODULE SKT FOR PM3 28SSOPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Lead Free Status / Rohs Status
 Details

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PIC16F913/914/916/917/946
16.2.6
On power-up, the time-out sequence is as follows: first,
PWRT time-out is invoked after POR has expired, then
OST is activated after the PWRT time-out has expired.
The total time-out will vary based on oscillator configu-
ration and PWRTE bit status. For example, in EC mode
with PWRTE bit erased (PWRT disabled), there will be
no time-out at all. Figure 16-4, Figure 16-5 and Figure
16-6 depict time-out sequences. The device can exe-
cute code from the INTOSC while OST is active, by
enabling Two-Speed Start-up or Fail-Safe Monitor (see
Section 4.7.2 “Two-Speed Start-up Sequence” and
Section 4.8 “Fail-Safe Clock Monitor”).
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then,
bringing MCLR high will begin execution immediately
(see Figure 16-5). This is useful for testing purposes or
to synchronize more than one PIC16F91X/946 device
operating in parallel.
Table 16-5 shows the Reset conditions for some
special registers, while Table 16-5 shows the Reset
conditions for all the registers.
TABLE 16-1:
TABLE 16-2:
TABLE 16-3:
DS41250F-page 224
STATUS
PCON
Legend:
Note 1:
XT, HS, LP
RC, EC, INTOSC
Note 1:
Legend: u = unchanged, x = unknown
Oscillator Configuration
POR
Name
0
1
u
u
u
u
u = unchanged, x = unknown,
used by BOR.
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
LP mode with T1OSC disabled.
TIME-OUT SEQUENCE
(1)
BOR
Bit 7
u
0
u
u
u
u
IRP
TIME-OUT IN VARIOUS SITUATIONS
PCON BITS AND THEIR SIGNIFICANCE
SUMMARY OF REGISTERS ASSOCIATED WITH BROWN-OUT
Bit 6
RP1
TO
1
1
0
0
u
1
T
PWRT
PWRTE = 0
Bit 5
RP0
T
T
PWRT
PD
OSC
1
1
u
0
u
0
+ 1024 •
-
= unimplemented bit, reads as ‘0’, q = value depends on condition. Shaded cells are not
SBOREN
Power-up
Bit 4
Power-on Reset
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during Sleep
TO
PWRTE = 1
1024 • T
Bit 3
PD
OSC
Bit 2
indicating that a Brown-out has occurred. The BOR
Status bit is a “don’t care” and is not necessarily
predictable if the brown-out circuit is disabled
16.2.7
The Power Control (PCON) register (address 8Eh) has
two Status bits to indicate what type of Reset that last
occurred.
Bit 0 is BOR (Brown-out Reset). BOR is unknown on
Power-on Reset. It must then be set by the user and
checked on subsequent Resets to see if BOR = 0,
(BOREN<1:0> = 00 in the Configuration Word register).
Bit 1 is POR (Power-on Reset). It is a ‘0’ on Power-on
Reset and unaffected otherwise. The user must write a
‘1’ to this bit following a Power-on Reset. On a
subsequent Reset, if POR is ‘0’, it will indicate that a
Power-on Reset has occurred (i.e., V
gone too low).
For more information, see Section 16.2.4 “Brown-Out
Reset (BOR)”.
Z
T
PWRT
PWRTE = 0
T
T
PWRT
Bit 1
POR
OSC
DC
+ 1024 •
Brown-out Reset
POWER CONTROL (PCON)
REGISTER
Condition
BOR
Bit 0
C
PWRTE = 1
1024 • T
© 2007 Microchip Technology Inc.
0001 1xxx
--01 --qq
POR, BOR
Value on
OSC
Wake-up from
1024 • T
DD
000q quuu
--0u --uu
Resets
Value on
Sleep
all other
may have
OSC
(1)

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